Bootstrap Circuit Charging Paths for Stable 2×Vdd Output
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Solution Overview
Problem
Conventional bootstrap circuits face inefficiencies due to parasitic capacitance and load capacitance, which affect the high voltage level output at the output terminal, especially at high frequencies, preventing the output voltage from ideally reaching 2×Vdd.
Innovation Solution
The proposed bootstrap circuit incorporates a sub-bootstrap circuit pair with a charging path providing circuit, which includes multiple charging and discharging paths controlled by the voltage levels at the input and output terminals, allowing for enhanced charging speed and reduced influence of load capacitance, thereby maintaining a high voltage level of 2×Vdd across the output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional bootstrap circuit is used, then the circuit structure is simple, but the output voltage cannot ideally reach 2×Vdd due to parasitic capacitance and load capacitance effects
Solution Approach 1:
The bootstrap circuit is divided into two symmetrical sub-bootstrap circuits (first and second), each handling one phase of the clock signal. This segmentation allows independent optimization of each sub-circuit while maintaining overall simplicity, and enables the output voltage to more accurately reach 2×Vdd by reducing the impact of parasitic capacitance through differential operation.
Solution Approach 2:
The patent combines multiple charging paths (first charging path, second charging path, and third charging path) within each sub-bootstrap circuit to charge the bootstrap capacitor. This merging of charging paths increases the charging current and reduces the influence of load capacitance, enabling more accurate 2×Vdd output voltage while maintaining circuit simplicity through symmetrical design.
2Productivity
If the clock signal frequency is increased, then the productivity is improved, but the parasitic capacitance effect increases causing the output voltage to deviate from 2×Vdd
Solution Approach 1:
The patent implements continuous charging of the bootstrap capacitor through multiple parallel charging paths that remain active throughout the clock cycle. This continuous charging action ensures that even at high frequencies where parasitic capacitance effects are magnified, the capacitor maintains adequate charge to produce accurate 2×Vdd output voltage, thereby maintaining productivity without sacrificing precision.
Solution Approach 2:
The bootstrap capacitor is charged in advance through the dedicated charging paths before the high voltage output phase begins. This preliminary charging action ensures that the capacitor is fully charged to the required voltage level before the output stage operates, compensating for the increased parasitic capacitance effects at high frequencies and maintaining output voltage accuracy.
3Speed
If a single charging path is used, then the device complexity is low, but the charging speed is insufficient to overcome load capacitance effects
Solution Approach 1:
The patent applies different characteristics to different parts of the charging system by implementing three distinct charging paths with different transistor configurations (P-type and N-type). Each charging path is optimized for specific conditions, creating local quality variations that collectively achieve fast charging speed while managing the overall circuit complexity through modular, symmetrical design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the efficiency of the bootstrap circuit by maintaining a stable high voltage output across the output terminal, even at high frequencies, reducing the relative error and enhancing the response speed of the output voltage.
Implementation Method 1
an output terminal of the first inverter is electrically connected with a first end of the first bootstrap capacitor
Implementation Method 2
a first bootstrap capacitor, the first charging path is electrically connected between a second end of the first bootstrap capacitor and a power voltage
Data Source
AI summary
A bootstrap circuit includes an input terminal, an inverting input terminal, an output terminal, an inverting output terminal, a first sub-bootstrap circuit, a second sub-bootstrap circuit, and a charging path providing circuit. The first sub-bootstrap circuit includes a first bootstrap capacitor, a first charging path, a first discharging path, and a first high voltage providing path. The charging path providing circuit includes a third charging path. In response to a high voltage level inputted into the input terminal, the first charging path and the third charging path are turned on, the first bootstrap capacitor is charged to a capacitor voltage, and the first discharging path is turned on to discharge the output terminal. In response to a low voltage level inputted into the input terminal, a first superimposed voltage including the high voltage level and the capacitor voltage is provided to the output terminal.