Bootstrap Comparator Circuit for Low-Power Relaxation Oscillators
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Solution Overview
Problem
Current on-chip relaxation oscillators face challenges with high power dissipation, increased production costs, and reduced frequency stability due to complex comparator structures and inefficient capacitor charging/discharging processes, which are exacerbated by temperature and voltage offsets.
Innovation Solution
A relaxation oscillator design utilizing a comparator circuit with N-type and P-type MOS transistors connected in a bootstrap configuration, along with a phase inverter and voltage comparison circuits, to optimize capacitor charging and discharging, thereby reducing power consumption and layout complexity while improving frequency stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two capacitors are used to avoid frequency stability issues from delayed discharge time, then frequency stability is improved, but circuit area and production cost are doubled
Solution Approach 1:
The patent merges the functions of two separate capacitors into a single capacitor by implementing a unified charging and discharging circuit. The single capacitor is charged through a first switch and current source, then discharged through a second switch, eliminating the need for duplicate capacitor structures while maintaining oscillation stability.
Solution Approach 2:
The single capacitor serves multiple functions: it stores energy during charging phase, releases energy during discharging phase, and provides timing control for oscillation. The circuit design makes the capacitor universal by using it for both frequency determination and amplitude stabilization through the feedback mechanism.
2Reliability
If a complex comparator structure is designed to eliminate offset voltage and improve frequency stability, then frequency stability is improved, but device complexity and power dissipation increase
Solution Approach 1:
The comparator circuit automatically compensates for its own offset voltage through the feedback mechanism. When offset voltage causes threshold deviation, the feedback loop adjusts the operating point to restore accurate threshold detection, enabling the comparator to self-correct without external intervention or complex compensation circuits.
Solution Approach 2:
The patent implements a feedback connection from the output端 to the inverting input端 of the comparator. This feedback mechanism continuously monitors the output and adjusts the threshold voltage to compensate for offset errors, thereby improving frequency stability while keeping the comparator structure simple.
3Loss of energy
If current mode comparator is used to reduce power dissipation, then power dissipation is reduced, but offset voltage and temperature sensitivity remain problematic
Solution Approach 1:
The patent changes the operating parameters of the current mode comparator by dynamically adjusting the threshold voltage through feedback. This parameter adjustment compensates for temperature-induced variations and offset voltage, maintaining frequency stability while preserving the low power dissipation characteristics of the current mode architecture.
4Reliability
If polynomial resistors with complementary temperature coefficients are used to improve temperature stability, then temperature stability is improved, but resistor area and production cost increase
Solution Approach 1:
The patent extracts the temperature compensation function from the resistor network and transfers it to the feedback mechanism of the comparator. This eliminates the need for large-area polynomial resistors while maintaining temperature stability through dynamic threshold adjustment based on output voltage feedback.
Data Source
AI summary
The invention provides a comparator and a relaxation oscillator. The comparator comprises a comparator circuit. The comparator circuit comprises a current mode comparator circuit. The current mode comparator circuit comprises a first current mode comparison circuit and a second current mode comparison circuit. Both the first current mode comparison circuit and the second current mode comparison circuit are electrically connected with a first input end and a second input end of the comparator circuit; the first current mode comparison circuit comprises two N-type MOS transistors; gate electrodes of the two N-type MOS transistors are electrically connected with each other; the second current mode comparison circuit comprises two P-type MOS transistors; and gate electrodes of the two P-type MOS transistors are electrically connected with each other. The oscillator comprises the comparator.