Bootstrap Circuit Depression Transistor Integration

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Solution Overview

Problem

Existing semiconductor devices face challenges in reducing circuit area and cost while maintaining high voltage resistance, particularly in driver ICs that require a bootstrap circuit, as integrating a high voltage diode increases circuit size and power consumption.

Innovation Solution

A semiconductor device with a single chip configuration, featuring a termination region with a ring-like shape, separate power supply regions, and a bootstrap circuit using depression type transistors to manage voltage levels efficiently, reducing the need for external components and minimizing circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a pn junction diode with high voltage resistance is integrated into the driver IC, then the diode function is integrated, but the circuit area significantly increases

Engineering Contradiction:
Improveintegration of diode functionVSAvoidcircuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent combines the diode function with the bootstrap capacitor into a single integrated component structure. The diode is formed using the same semiconductor region that serves as the capacitor, merging two functions into one physical entity to reduce overall circuit area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The semiconductor structure performs multiple functions simultaneously: it acts as both a diode for voltage rectification and a capacitor for energy storage. The same doped region provides both the pn junction diode characteristic and the capacitor electrode, enabling one component to fulfill multiple roles.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a pn junction diode with high voltage resistance is integrated into the driver IC, then the diode function is integrated, but the power consumption increases due to parasitic current

Engineering Contradiction:
Improveintegration of diode functionVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent optimizes the doping concentration parameters to achieve low reverse leakage current. By carefully controlling the impurity concentration in the doped region (1×10^16 to 1×10^18 atoms/cm³), the reverse saturation current is minimized, reducing parasitic power consumption while maintaining high voltage resistance.

Inventive Principle:
Principle #35Parameter changes

3Area of stationary object

If the circuit area is reduced by using alternative methods, then the size decreases, but additional components like LDMOS and booster circuits are required

Engineering Contradiction:
Improvecircuit areaVSAvoidcircuit complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent merges the diode and capacitor into a single integrated structure, eliminating the need for separate LDMOS devices and booster circuits. This consolidation reduces both circuit area and overall device complexity by combining functions that would otherwise require multiple discrete components.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated semiconductor structure provides multiple functions (diode rectification, capacitor energy storage, and voltage regulation) within a single component, replacing what would otherwise require several separate components including LDMOS and booster circuits, thereby reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9866207B2Semiconductor device, power control device and electronic system
Publication Date: 2018.01.09 RENESAS ELECTRONICS CORP
  • US9866207B2 patent drawing
  • US9866207B2 patent drawing
  • US9866207B2 patent drawing

AI summary

A driver integrated circuit includes a bootstrap circuit (BSC) configured to output a boot power supply voltage (VB) based on a first power supply voltage, the boot power supply voltage being higher than the first power supply voltage; a level shift circuit (LSC) configured to output an output pulse signal based on an input pulse signal and the boot power supply voltage; a high side driving circuit (HSU) configured to output a high side driving voltage based on the boot power supply voltage and the output pulse signal, wherein the bootstrap circuit includes a sense metal oxide semiconductor (MOS) transistor and a boot MOS transistor, wherein the sense MOS transistor includes a depression-type transistor.