Bootstrap Diode Leakage Suppression in High Voltage MOSFET

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Solution Overview

Problem

High-voltage integrated circuit devices face issues with leakage current due to holes flowing to the substrate side during forward biasing of the bootstrap diode, which reduces charging current for the bootstrap capacitor and increases chip area.

Innovation Solution

A semiconductor device with a p-type semiconductor substrate, an n-type buried layer, and a high-voltage n-channel MOSFET, featuring a floating potential region and separation regions to isolate the diode, reducing leakage current and increasing charging efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the bootstrap diode is forward biased to charge the bootstrap capacitor, then the charging current increases, but leakage current flows to the substrate side reducing efficiency

Engineering Contradiction:
Improvecharging currentVSAvoidleakage current
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The substrate is divided into multiple regions with different potential levels. A floating potential region is created between the diode formation region and the substrate, separated by insulating films. This segmentation prevents direct current leakage to the substrate while allowing charging current to flow through the isolated path to the bootstrap capacitor.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An insulating film is introduced as an intermediary between the diode formation region and the substrate. This intermediary layer blocks the leakage current path to the substrate while maintaining electrical isolation, allowing the bootstrap diode to charge the capacitor without losing current to the substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If separation regions are added to isolate the diode and reduce leakage current, then leakage current is suppressed, but chip area increases

Engineering Contradiction:
Improveleakage current suppressionVSAvoidchip area
Core Design Contradiction:
Loss of energyVSArea of stationary object

Solution Approach 1:

Instead of using lateral separation regions that consume chip area, the patent uses vertical isolation through insulating films deposited in trenches. The floating potential region is created by depositing insulating films to a depth that electrically isolates the diode formation region from the substrate, utilizing the third dimension (depth) rather than lateral space.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The insulating films are nested within trenches formed in the substrate. The first insulating film is deposited to a first depth, then a second insulating film is deposited to a second depth greater than the first, creating a nested structure that provides multiple levels of electrical isolation while minimizing lateral space consumption.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses leakage current and enhances charging current for the bootstrap capacitor, while minimizing the chip area, thus improving the performance and efficiency of high-voltage integrated circuit devices.

Implementation Method 1

a p-type first separation region surrounding the part of the semiconductor layer where the floating potential region is provided, the first separation region being in contact with the semiconductor substrate, and spaced apart from the floating potential region to be formed in a ring-like shape; a p-type second separation region spaced apart from the first separation region to surround, in a ring-like shape, a region where the diode is located

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

an n-type buried layer formed on the semiconductor substrate; an n-type semiconductor layer formed on the buried layer; a diode

Methodology Applied
Scientific Effectpn junction rectification: Diode

Data Source

PatentEP3010042B1Semiconductor device
Publication Date: 2020.04.15 FUJI ELECTRIC CO LTD
  • EP3010042B1 patent drawingFigure 1
  • EP3010042B1 patent drawingFigure 2A~2B
  • EP3010042B1 patent drawingFigure 3

AI summary

In a semiconductor device (100) including a bootstrap diode (Db) and a high voltage electric field transistor (62) on a p-type semiconductor substrate (1), a cavity (3) is formed in an n--type buried layer (50) of the semiconductor substrate (1) to use the buried layer (50) beneath the cavity as a drain drift region of the high voltage n-channel MOSFET (62), whereby a leakage current by holes (92) that flows to the semiconductor substrate (1) side in forward biasing of the bootstrap diode (Db) can be suppressed, and charging current for a bootstrap capacitor C1 can be increased, as well as increase in chip area can be suppressed.