Bootstrap Half-Bridge Circuit for Robust Two-Wire Bus Voltage Swings
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Solution Overview
Problem
Existing two-wire bus devices, particularly those for differential buses, face limitations in maximum differential voltage, robustness against electrostatic discharges, and stability under reference voltage shifts.
Innovation Solution
A half-bridge circuit design incorporating PMOS and NMOS transistors with integrated control circuits and bootstrap charge pumps enhances the robustness and voltage handling capabilities, including electrostatic discharge protection and reference voltage offset tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional two-wire bus devices are used, then the device complexity is low, but the maximum differential voltage value is limited and the device cannot withstand high electrostatic discharges
Solution Approach 1:
The driver circuit is divided into a half-bridge circuit with separate PMOS and NMOS transistors, allowing independent optimization of each transistor's characteristics for ESD protection and voltage swing. The bootstrap charge pump is separated as an independent voltage generation module, enabling it to be optimized without affecting the main driver functionality.
Solution Approach 2:
The bootstrap charge pump proactively generates and stores the elevated voltage needed for the PMOS transistor gate before ESD events or high-differential voltage transmission occurs. This preliminary voltage preparation ensures the PMOS transistor can immediately handle high voltage swings and ESD pulses without requiring complex real-time protection circuits.
2Reliability
If the differential voltage level is increased to improve signal integrity, then the robustness against reference voltage shifts improves, but the risk of electrostatic discharge damage increases
Solution Approach 1:
The PMOS transistor is designed with enhanced voltage handling capability and the bootstrap charge pump pre-charges the gate to an elevated voltage level. This creates a voltage cushion or headroom that allows the circuit to tolerate high differential voltage swings and ESD pulses without damage, effectively cushioning against voltage excursions before they become harmful.
3Reliability
If a simple driver circuit is used, then the manufacturing cost is low, but the device cannot maintain robustness against reference voltage shifts
Solution Approach 1:
The bootstrap charge pump serves multiple functions: it generates the elevated voltage for the PMOS gate to enable high differential voltage output, provides ESD protection by establishing voltage headroom, and maintains robustness against reference voltage shifts. This multi-functionality achieves high reliability without proportionally increasing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution increases the maximum differential voltage and improves the device's resilience to electrostatic discharges and reference voltage shifts, ensuring reliable operation in challenging environments.
Implementation Method 1
a capacitive element having a first electrode coupled with, preferably connected to, the gate of the third transistor, the charge pump being configured to charge the capacitive element from the intermediate node and without a clock signal
Implementation Method 2
a first diode having its anode coupled with the gate of the third transistor and its cathode coupled with the second node
Data Source
AI summary
The present disclosure relates to a half-bridge circuit comprising first and second PMOS transistors in series between the first node and an intermediate node, a third PMOS transistor and a fourth NMOS transistor in series between the intermediate node and the second node, and a control circuit. The control circuit comprises a bootstrap charge pump. The charge pump comprises a capacitive element having a first electrode coupled with the gate of the third transistor. The charge pump is configured to charge the capacitive element from the intermediate node and without a clock signal. The present application also relates to a device comprising two identical half-bridge circuits connected to two respective conductors of a bus.