Bootstrap Inverter Circuit for Full-Swing Logic Output
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Solution Overview
Problem
Conventional inverters using N-channel transistors face issues where the output voltage does not reach complete 0V when logic '0' and is smaller than VDD when logic '1', affecting the accuracy of digital signal transmission.
Innovation Solution
The inverter design incorporates a control transistor that connects the source electrode of the first load transistor to ground when its gate electrode is turned on, ensuring the output node voltage reaches 0V, and includes a bootstrap transistor and capacitor to maintain accurate output levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a conventional N-channel inverter uses a load transistor and driving transistor configuration, then the circuit area is minimized by using transistors instead of resistors, but the output voltage cannot reach complete 0V when logic '0' due to the resistance ratio between transistors
Solution Approach 1:
The patent divides the load function into two separate transistors (first load transistor and second load transistor) instead of using a single load transistor. This segmentation allows independent control of the pull-up path, enabling the output to reach complete VDD when logic '1' while maintaining the ability to reach complete 0V when logic '0' through the driving transistor's control of the pull-down path.
Solution Approach 2:
The patent introduces a control transistor as an intermediary element that manages the connection between the first load transistor's source and the second load transistor. This control transistor acts as a mediator to ensure proper voltage levels at the output node, enabling both complete 0V and VDD output levels by controlling the interaction between the load transistors and driving transistor.
2Manufacturing precision
If the resistance of the load transistor is increased to improve the output voltage to VDD, then the output voltage approaches VDD, but the output current decreases due to current flow through the load transistor
Solution Approach 1:
By segmenting the load function into two transistors, the patent creates separate control paths for voltage level establishment and current management. The first load transistor can be optimized for voltage level (higher resistance to achieve VDD) while the second load transistor and driving transistor configuration manages the current flow, decoupling the voltage and current optimization goals.
Solution Approach 2:
The patent employs dynamic control through the control transistor that adjusts the connection state between the first load transistor's source and the second load transistor based on the input logic level. This dynamic switching allows the circuit to optimize for voltage level during pull-up phases and for current drive during pull-down phases, resolving the static trade-off between voltage accuracy and output current.
3Device complexity
If a single load transistor is used in an N-channel inverter, then the circuit complexity is reduced, but the output voltage cannot reach complete VDD because the load transistor turns off when output reaches VDD-Vth
Solution Approach 1:
The patent segments the load transistor function into two distinct transistors with different roles. The first load transistor's gate is connected to VDD, allowing it to remain continuously conductive and pull the output to complete VDD. The second load transistor works in conjunction with the driving transistor for the pull-down operation. This segmentation eliminates the self-turning-off problem of a single load transistor while maintaining reasonable circuit complexity.
Solution Approach 2:
The first load transistor serves a universal function of continuously providing a pull-up path to VDD regardless of the output voltage level, unlike a conventional load transistor that must turn off when the output reaches VDD-Vth. This multi-functional approach allows the same transistor structure to achieve both complete voltage swing and proper logic level restoration.
Data Source
AI summary
The present invention provides an inverter and a bootstrap inverter with improved output characteristics. The inverter comprises a first and second load transistors, a driving transistor, and a control transistor. The control transistor, when turned on, effectively grounds the source of the first load transistor, ensuring a 0V output. The bootstrap inverter further includes a bootstrap transistor and a capacitor. This configuration solves the problems of output voltage being lower than VDD for logic ‘1’ and not completely 0V for logic ‘0’, achieving ideal output levels.