Bootstrap Unit for High-Side NMOS Gate Drive
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing power supply conversion systems face challenges in implementing high-voltage bootstrap circuits without epitaxial and N+bury layers, leading to increased costs, production time, and reduced flexibility, while also suffering from high conduction voltage drops and reverse leakage due to the use of Schottky diodes.
Innovation Solution
A power supply conversion apparatus utilizing a high-end N-type metal-oxide-semiconductor (NMOS) switch bootstrap circuit, comprising a switch unit with NMOS transistors and a bootstrap unit with PMOS transistors and a capacitor, which generates a gate turn-on voltage for the NMOS transistor, allowing complete conduction without exceeding the maximum AVDD voltage, thus avoiding the need for Schottky diodes and reducing parasitic leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Schottky diode is used to implement Bootstrap circuit, then charging function is achieved, but forward conduction voltage drop occurs and reverse leakage increases
Solution Approach 1:
The patent extracts and removes the Schottky diode from the Bootstrap circuit, replacing it with a capacitor-based charging mechanism. This eliminates the forward conduction voltage drop and reverse leakage issues inherent to Schottky diodes while maintaining the voltage boosting function.
Solution Approach 2:
The patent introduces a capacitor (CBST) as an intermediary energy storage element to replace the direct diode-based charging path. The capacitor acts as a mediator that stores charge during phase1 and releases it during phase2, achieving voltage boosting without the losses associated with diode conduction.
2Ease of manufacture
If Schottky diode is used in Bootstrap circuit, then charging is enabled, but Schottky process is introduced increasing cost and production time
Solution Approach 1:
The patent removes the Schottky diode component and its associated Schottky fabrication process from the manufacturing flow. By replacing it with standard capacitor and transistor elements, the patent eliminates the need for specialized Schottky processes, thereby reducing production complexity and time.
Solution Approach 2:
The patent changes the fundamental operating parameters of the Bootstrap circuit from diode-based voltage rectification to capacitor-based voltage storage and transfer. This parameter change allows the use of standard semiconductor processes instead of specialized Schottky processes.
3Area of stationary object
If High Side NMOS is used to reduce area, then conduction impedance decreases, but Bootstrap voltage must reach PVDD+AVDD requiring additional voltage headroom
Solution Approach 1:
The patent performs preliminary charging of the bootstrap capacitor CBST during phase1 before the High Side NMOS needs to conduct. By pre-storing the necessary voltage on the capacitor, the circuit eliminates the need for additional voltage headroom beyond PVDD, as the capacitor provides the required gate drive voltage directly.
Solution Approach 2:
The bootstrap capacitor serves the dual function of voltage storage and automatic voltage boosting. The circuit uses its own operating phases to automatically charge and discharge the capacitor, providing self-service voltage multiplication without requiring external voltage sources or complex control mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces production costs and time, improves system efficiency, and expands the application range by eliminating the requirement for high-voltage Schottky diodes, achieving near-zero conduction voltage drops and minimizing the input power supply voltage, while preventing parasitic leakage.
Implementation Method 1
AVDD directly charges a capacitor CBST by using the Schottky diode... because of the charge continuity of the capacitor, the voltage of the BST node may rise to PVDD+AVDD
Data Source
AI summary
Embodiments of the present invention disclose a power supply conversion apparatus, where a control unit generates a corresponding control signal according to a received high level pulse width modulation signal, to control a first PMOS transistor Q3, a second PMOS transistor Q4, and a second NMOS transistor Q2 to be turned off successively, and then to make a first NMOS transistor Q1 conducted, which makes a voltage at a second end of a bootstrap capacitor to rise from ground potential to a PVDD, so that a voltage at a first end of the bootstrap capacitor rises to a PVDD+AVDD as the voltage at the second end rises, and a gate turn-on voltage of the first NMOS transistor Q1 reaches the PVDD+AVDD.