Bootstrap CMOS Pass Gate Circuit for Leakage and Voltage Decay

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Solution Overview

Problem

Existing CMOS pass gate circuits in field-programmable gate arrays suffer from significant current leakage and voltage decay, leading to high static power consumption and heat dissipation.

Innovation Solution

Incorporating a bootstrap circuit that enhances the drive gain of CMOS pass gate circuits by using complementary metal-oxide-semiconductor (CMOS) transistors, which maintains a constant drive voltage across transistors, reducing current leakage and voltage decay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a CMOS pass gate circuit is implemented in an FPGA device, then the device can perform logic functions, but the circuit suffers from significant current leakage and voltage decay

Engineering Contradiction:

Improvesignal stabilityVSAvoidcurrent leakage

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The bootstrap circuit pre-charges the gate nodes of the pass-transistor logic circuit before signals are passed through, ensuring that the transistors are properly biased and can maintain signal levels without significant leakage or voltage decay during operation

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The bootstrap circuit acts as an intermediary between the power supply and the pass-transistor logic circuit, providing regulated bootstrap voltages that mediate the power delivery and ensure stable operation while minimizing direct leakage paths

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If a CMOS pass gate circuit is implemented, then logic functions can be performed, but static power consumption is significant

Engineering Contradiction:

Improvelogic function performanceVSAvoidstatic power consumption

Core Design Contradiction:

ProductivityVSUse of energy by stationary object

Solution Approach 1:

The bootstrap circuit pre-establishes proper voltage levels on gate nodes before logic operations commence, enabling the pass-transistor logic to operate with minimal static power consumption by eliminating the need for continuous biasing currents

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The invention changes the voltage parameters dynamically through the bootstrap mechanism, adjusting gate voltages based on signal conditions to optimize the balance between logic performance and power consumption across different operating states

Inventive Principle:

Principle #35Parameter changes

3Productivity

If a CMOS pass gate circuit is implemented, then device functionality is achieved, but heat dissipation is significant

Engineering Contradiction:

Improvedevice functionalityVSAvoidheat dissipation

Core Design Contradiction:

ProductivityVSTemperature

Solution Approach 1:

The bootstrap circuit converts the potential harm of voltage drops and leakage into a benefit by using these voltage changes as signals to trigger bootstrap activation, which then restores proper voltage levels and prevents excessive heat generation from continuous leakage currents

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20250309898A1Apparatus including a CMOS pass gate circuit and a bootstrap circuit

Publication Date: 2025.10.02 MICROSEMI SOC CORP

AI summary

One or more examples relate to a complementary metal-oxide-semiconductor (CMOS) device. The CMOS device includes a CMOS pass gate circuit, a control circuit, and a bootstrap circuit. The CMOS pass gate circuit includes an n-channel transistor and a p-channel transistor. The control circuit may activate and deactivate the CMOS pass gate circuit. The bootstrap circuit may be electrically connected between the CMOS pass gate circuit and the control circuit. The bootstrap circuit may increase a first drive gain of the n-channel transistor and a second drive gain of the p-channel transistor.