Bootstrap Sampling Switch for Low-Distortion ADC Sampling
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Solution Overview
Problem
Sampling circuits in integrated circuits introduce distortions due to non-idealities such as variable on-resistance, channel charge depletion, sampling aperture jitter, and clock feed-through, affecting the resolution of analog to digital converters.
Innovation Solution
A sampling circuit with a switch and bootstrap modules that vary the control voltage with a substantially constant value to maintain a conducting channel and hold output voltage as a sample, using n-type or p-type MOS transistors, and capacitors to couple the control terminal with a sampling clock signal, reducing sampling distortions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sampling circuit uses a conventional switch with fixed control voltage, then the circuit structure is simple, but sampling distortions occur due to variable on-resistance and channel charge depletion
Solution Approach 1:
The patent applies dynamics by making the control voltage dynamic rather than fixed. The control voltage varies with the input signal voltage to maintain a substantially constant on-resistance of the switch. This is achieved through a control voltage generation circuit that adjusts the control voltage based on the instantaneous input signal level, thereby optimizing the switch performance during each sampling cycle and reducing sampling distortions.
Solution Approach 2:
The patent changes the parameter of control voltage from a fixed value to a variable value that depends on the input signal. By adjusting the control voltage parameter dynamically according to the input signal voltage, the switch maintains optimal operating conditions with substantially constant on-resistance, improving sampling accuracy while managing the increased circuit complexity through systematic parameter control.
2Measurement precision
If the control voltage is varied with the input signal to maintain constant on-resistance, then sampling distortions are reduced, but the circuit complexity increases due to additional control voltage generation components
Solution Approach 1:
The patent implements feedback by using the input signal voltage itself as the basis for generating the control voltage. The control voltage generation circuit monitors the input signal voltage and automatically adjusts the control voltage to maintain constant on-resistance. This feedback mechanism ensures that the switch operates optimally across different input signal levels, improving sampling resolution without requiring complex external control systems.
Solution Approach 2:
The control voltage generation circuit serves itself by using the input signal voltage directly as the reference for generating the appropriate control voltage. The circuit automatically adjusts its own control voltage based on the instantaneous input signal level, eliminating the need for complex external control systems or additional sensing circuits, thereby improving sampling resolution with minimal added complexity.
3Reliability
If a bootstrap capacitor is used to couple the control terminal with the sampling clock signal, then channel charge depletion is minimized, but clock feed-through effects may be introduced
Solution Approach 1:
The patent addresses clock feed-through by dynamically adjusting the control voltage parameter to compensate for its effects. The control voltage generation circuit is designed to account for clock feed-through and other non-idealities, adjusting the control voltage to maintain substantially constant on-resistance despite the presence of clock feed-through, thereby maintaining channel charge stability while mitigating harmful effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces sampling distortions by maintaining a constant voltage difference and channel charges, improving the resolution of analog to digital converters by minimizing channel charge dissipation and clock feed-through.
Implementation Method 1
The first bootstrap module can include a capacitor that couples the control terminal of the switch and the node receiving the sampling clock signal
Implementation Method 2
a conducting channel can be formed between the first channel terminal and the second channel terminal to enable an output voltage on the second channel terminal to track the input signal
Data Source
AI summary
Aspects of the disclosure provide a sampling circuit having reduced sampling distortions. The sampling circuit can include a switch having a control terminal, a first channel terminal and a second channel terminal. The first channel terminal can be configured to receive an input signal, and the control terminal can be configured to have a control voltage that varies with regard to the input signal, such that a conducting channel can be formed between the first channel terminal and the second channel terminal to enable an output voltage on the second channel terminal to track the input signal. Further, the sampling circuit can include a bootstrap module coupled to the control terminal of the switch. The bootstrap module can be configured to change the control voltage by a substantially constant value to turn off the conducting channel between the first channel terminal and the second channel terminal in order to hold the output voltage as a sample of the input signal. In addition, the bootstrap module can be configured to couple a voltage increase to the control terminal of the switch to increase a turn-on speed of the switch.