Bootstrap Switch Circuit for High-Voltage FET Protection

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Solution Overview

Problem

Existing switches, such as FET switches, face challenges with current leakage under certain signaling conditions and potential damage from high voltage levels, leading to junction and gate-oxide damage.

Innovation Solution

The implementation of a high voltage tolerant bootstrap switch using a series connection of two FETs, with a switch control circuit that configures the switch between an OFF state and an ON state, allowing the switch to withstand large voltage swings without FET damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single FET is used to provide low impedance between source and drain, then the switch achieves low impedance in ON state, but the FET suffers from current leakage and high voltage damage in OFF state

Engineering Contradiction:
Improvevoltage toleranceVSAvoidcurrent leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent divides a single FET switch into two series-connected FETs (first FET and second FET). Each FET handles a portion of the voltage stress, allowing the switch to tolerate higher voltages in the OFF state while maintaining low impedance in the ON state. The series configuration ensures that both FETs must be simultaneously conductive for current to flow, reducing leakage paths.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a single FET is used to provide low impedance between source and drain, then the switch achieves low impedance in ON state, but the FET suffers from gate-oxide damage under high voltage conditions

Engineering Contradiction:
Improvegate-oxide durabilityVSAvoidvoltage withstand capability
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent segments the voltage stress across two series-connected FETs. Each FET experiences reduced voltage stress compared to a single FET handling the full voltage, thereby protecting the gate-oxide from high voltage damage while maintaining the ability to withstand high voltages in OFF state.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control circuit pre-configures the gate voltages of both FETs before high voltage conditions occur. In the OFF state, the control circuit ensures both FETs are non-conductive, creating a protective barrier against high voltage before damage can occur. This preemptive configuration protects the gate-oxide from voltage spikes and transients.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If FET gates are controlled with fixed voltages, then the switch achieves simple control circuitry, but the switch cannot maintain high linearity under varying input voltage conditions

Engineering Contradiction:
ImprovelinearityVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs dynamic gate voltage control where the control circuit adjusts the gate voltages of both FETs based on the input voltage conditions. This dynamic adjustment maintains optimal linearity across varying input voltage ranges. The control circuit monitors the input voltage and dynamically configures the FET states to preserve linear operation characteristics.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The control circuit implements feedback mechanisms to monitor the input voltage and adjust the gate voltages of the series-connected FETs accordingly. This feedback ensures that the switch maintains high linearity under varying input voltage conditions by dynamically optimizing the FET operating points based on real-time voltage conditions.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250141442A1High voltage tolerant bootstrap switch
Publication Date: 2025.05.01 ANALOG DEVICES INT UNLTD CO
  • US20250141442A1 patent drawing
  • US20250141442A1 patent drawing
  • US20250141442A1 patent drawing

AI summary

Apparatus and methods for high voltage tolerant bootstrap switches are disclosed. In certain embodiments, an integrated circuit (IC) includes an input node that receives an input voltage, an output node, and a switch connected between the input node and the output node. The switch includes a first field-effect transistor (FET) and a second FET electrically connected in series between the input node and the output node. The switch is configurable between an OFF state in which a gate of the first FET is controlled with a first voltage and a gate of the second FET is controlled with a second voltage, and an ON state in which the gates of the first FET and the second FET are controlled with a voltage that tracks the input voltage.