Bootstrap Switch Gate Tracking for High-Voltage FET Protection

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Solution Overview

Problem

Field-effect transistor (FET) switches are prone to junction damage and gate-oxide damage due to high voltage levels, especially under certain signaling conditions, which can affect their performance and reliability.

Innovation Solution

A high voltage tolerant bootstrap switch is implemented using a series connection of FETs, where the gates of the FETs are controlled with specific voltages to achieve both high voltage tolerance in the OFF state and high linearity in the ON state, including the use of additional FETs to enhance OFF state tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single FET is used to provide low impedance between source and drain, then the switch achieves low impedance in ON state, but the FET suffers from junction damage and gate-oxide damage under high voltage conditions

Engineering Contradiction:
Improvevoltage toleranceVSAvoidjunction damage and gate-oxide damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the single FET into two series-connected FETs (first FET and second FET). This segmentation allows the voltage to be distributed across both devices, with each FET experiencing reduced voltage stress that remains within safe operating limits, thereby preventing junction and gate-oxide damage while maintaining the switching function.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the gates of series-connected FETs are controlled with fixed voltages, then the switch achieves high voltage tolerance in OFF state, but the linearity in ON state deteriorates

Engineering Contradiction:
Improvevoltage tolerance in OFF stateVSAvoidlinearity in ON state
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic gate voltage control where the gate voltages of the first and second FETs are adjusted based on the input voltage level. The control circuit generates gate voltages that track the input voltage, ensuring that the FETs operate in their linear region during the ON state. This dynamic adjustment maintains both high voltage tolerance in the OFF state and high linearity in the ON state, resolving the contradiction between these two requirements.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4550665B1High voltage tolerant bootstrap switch
Publication Date: 2026.04.01 ANALOG DEVICES INT UNLTD CO
  • EP4550665B1 patent drawingFigure 1~2B
  • EP4550665B1 patent drawingFigure 3A~3B
  • EP4550665B1 patent drawingFigure 4~5

AI summary

Apparatus and methods for high voltage tolerant bootstrap switches are disclosed. In certain embodiments, an integrated circuit (IC) includes an input node that receives an input voltage, an output node, and a switch connected between the input node and the output node. The switch includes a first field-effect transistor (FET) and a second FET electrically connected in series between the input node and the output node. The switch is configurable between an OFF state in which a gate of the first FET is controlled with a first voltage and a gate of the second FET is controlled with a second voltage, and an ON state in which the gates of the first FET and the second FET are controlled with a voltage that tracks the input voltage.