Bootstrap Switch Circuit With GIDL Leakage Protection

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Solution Overview

Problem

Gate-induced drain leakage (GIDL) in field effect transistors (FETs) leads to increased current draw and degrades signal-to-noise and distortion ratio (SINAD) in circuits, particularly in multiplexer designs like the 16-bit successive approximation register (SAR) analog-to-digital converter (ADC), as high voltage applied to the drain with the gate grounded creates a deep-depletion region causing leakage.

Innovation Solution

A bootstrap switch circuit is designed with a leakage protection transistor, controlled by a second gate signal, which is connected in series with the transistor-based switch to reduce GIDL. This circuit includes a first gate driver that charges a capacitor during the hold mode and a second gate driver that manages the leakage protection transistor's operation based on the output signal of the bootstrap switch circuit, ensuring the VGS of the leakage protection transistor remains below the GIDL threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high voltage is applied to the drain with the gate grounded in a transistor-based switch, then the switch can effectively block signal transmission during hold mode, but gate induced drain leakage (GIDL) occurs causing increased current draw and degraded SINAD

Engineering Contradiction:
Improvesignal blocking capabilityVSAvoidgate induced drain leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A leakage protection transistor is introduced as an intermediary component between the input node and the hold node. This intermediate transistor is controlled by a second gate signal to prevent direct high-voltage stress on the main switch's drain-gate overlap region, thereby eliminating GIDL while maintaining the signal blocking function during hold mode

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The circuit dynamically changes the voltage parameters by applying a controlled gate voltage to the leakage protection transistor through the second gate driver. By adjusting the gate voltage of the protection transistor, the circuit maintains the main switch in a state that blocks signal transmission while preventing the formation of deep-depletion regions that cause GIDL

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If a leakage protection transistor is added to reduce GIDL, then current draw is reduced and SINAD is improved, but the circuit complexity increases due to additional transistors and gate drivers

Engineering Contradiction:
Improveleakage currentVSAvoidcircuit structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The switching function is segmented into two independent transistor stages: the main transistor-based switch for signal transmission and blocking, and the leakage protection transistor for preventing GIDL. Each stage has its own gate driver, allowing independent control and optimization of each function while keeping the overall circuit modular and manageable

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12113520B2Circuit to reduce gate induced drain leakage
Publication Date: 2024.10.08 NXP BV
  • US12113520B2 patent drawing
  • US12113520B2 patent drawing
  • US12113520B2 patent drawing

AI summary

A bootstrap switch circuit includes a transistor-based switch controlled by a first gate signal and a leakage protection transistor controlled by a second gate signal configured to reduce gate induced drain leakage in the transistor-based switch A first gate driver is included that produces a first gate signal at its output so that the first gate signal turns on the transistor-based switch during a sampling mode and turns off the transistor-based switch during a hold mode. A second gate driver is included that produces a second gate signal at its output and to receive the output signal of the bootstrap switch circuit so that the second gate signal turns on the leakage protection transistor during the sampling mode and turns off the leakage protection transistor during the hold mode and the second gate signal is based upon the output signal of the bootstrap switch circuit.