Bootstrap Switch Topology for Jitter-Free Non-Overlapping Clocks
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Solution Overview
Problem
Timing circuits used in bootstrap switches to generate non-overlapping clock signals introduce jitter/skew, degrading performance due to the inclusion of delay circuits and clock drivers.
Innovation Solution
A bootstrap circuit design that includes a boost capacitor, transistors, and a switch transistor, where the gate of the switch transistor is coupled to the output of the bootstrap circuit, and a terminal is coupled to the input, to generate an output clock signal that maintains a constant gate-to-source voltage, reducing on resistance variation and signal distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If timing circuits including delay circuits and clock drivers are used to generate non-overlapping clock signals, then crosstalk between channels is reduced, but jitter and skew are introduced degrading performance
Solution Approach 1:
The patent extracts and removes the timing circuit (including delay circuits and clock drivers) from the bootstrap switch architecture. By eliminating these components, the source of jitter and skew is removed while alternative mechanisms (such as overlapping switches with different timing) are used to achieve channel isolation without degrading signal quality
Solution Approach 2:
The patent segments the switching function into multiple overlapping switches that operate in different time phases. Instead of using a single switch controlled by a timing circuit, multiple switches are used with staggered timing to achieve the same channel isolation function without introducing jitter
2Object-affected harmful factors
If timing circuits are implemented to generate non-overlapping clock signals, then channel isolation is improved, but device complexity increases due to additional delay circuits and clock drivers
Solution Approach 1:
The timing circuit components (delay circuits and clock drivers) are extracted and removed from the system. The channel isolation function is achieved through alternative means that do not require these complex timing generation components, thereby reducing overall device complexity
Solution Approach 2:
The bootstrap circuit is designed to perform multiple functions including channel isolation and signal switching without requiring separate dedicated timing circuits. The same switching mechanism achieves both channel separation and signal routing, reducing the need for additional complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution reduces jitter/skew in the output clock signal, leading to improved performance by maintaining a constant on resistance of the switch transistor, thus enhancing signal linearity and reducing crosstalk between channels.
Implementation Method 1
a boost capacitor having a first terminal and a second terminal, a first transistor coupled between the first terminal of the boost capacitor and the output of the bootstrap circuit
Data Source
AI summary
A system includes a bootstrap circuit having an input and an output. The bootstrap circuit includes a boost capacitor having a first terminal and a second terminal, a first transistor coupled between the first terminal of the boost capacitor and the output of the bootstrap circuit, a second transistor, and a third transistor, wherein the second transistor and the third transistor are coupled in series between a gate of the first transistor and the second terminal of the boost capacitor. The system also includes a switch transistor, wherein a gate of the switch transistor is coupled to the output of the bootstrap circuit, and a terminal of the switch transistor is coupled to the input of the bootstrap circuit.