Bootstrap UVLO Detection in Buck Converters Without Level Shifters

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing buck converters require additional circuitry and high-voltage devices to detect bootstrap under-voltage lockout (UVLO) events, leading to delays and inefficiencies.

Innovation Solution

A UVLO detection scheme that utilizes a BOOT UVLO circuit with a detection element and logic gate to compare BOOT voltage with a switch node voltage, eliminating the need for extra level shifters by directly controlling the high-side switch based on UVLO events, using logic and gate signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional level shifters and high-voltage devices are used to detect BOOT UVLO events, then detection capability is improved, but device complexity and area increase

Engineering Contradiction:
ImproveBOOT UVLO detection capabilityVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the UVLO detection function from the high-voltage BOOT domain and relocates it to the low-voltage control domain. By using the existing SW node voltage as a reference and comparing it with BOOT voltage through a comparator, the detection capability is maintained while eliminating the need for additional high-voltage level shifters and devices in the BOOT domain.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The SW node, which already serves as a switching node in the buck converter, is additionally utilized as a reference voltage source for UVLO detection. This multi-functional use of the SW node eliminates the need for dedicated detection circuitry, thereby reducing device complexity and area while maintaining reliable UVLO detection capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional level shifters and high-voltage devices are used to detect BOOT UVLO events, then detection capability is improved, but response time increases

Engineering Contradiction:
ImproveBOOT UVLO detection capabilityVSAvoiddetection delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by continuously monitoring the BOOT voltage against the SW node voltage using a comparator that is always active. This continuous comparison ensures that UVLO events are detected immediately when they occur, eliminating detection delays that would arise from periodic sampling or sequential detection methods.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By extracting the detection function to the low-voltage domain using the existing SW node as reference, the patent eliminates the time-consuming voltage level translation process required by traditional level shifters. The comparator can directly compare voltages without waiting for level conversion, thereby reducing response time.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If additional high-voltage devices are used for UVLO detection, then detection accuracy is improved, but manufacturing cost and device area increase

Engineering Contradiction:
ImproveUVLO detection accuracyVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent makes the SW node multi-functional by using it both as the switching node for the buck converter and as the reference voltage source for UVLO detection. This eliminates the need for dedicated reference voltage generation circuitry and high-voltage detection devices, thereby reducing circuit area while maintaining detection accuracy through the existing robust SW node signal.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The detection function is extracted from the high-voltage BOOT domain and implemented in the low-voltage control domain using a standard comparator. This extraction eliminates the need for area-consuming high-voltage detection devices while maintaining detection precision, as the comparator can accurately compare the BOOT voltage with the SW node reference voltage.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables faster response and area savings by directly detecting UVLO events without additional circuitry, ensuring efficient operation of the buck converter.

Implementation Method 1

a BOOT UVLO detection element configured to compare a BOOT voltage with a switch node (SW) voltage to determine an occurrence of a BOOT UVLO event

Methodology Applied
Scientific EffectVoltage comparison:

Implementation Method 2

The bootstrap capacitor provides a floating voltage supply to the high-side MOSFET driver to switch the input voltage to the load

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 3

This charging is usually accomplished through a diode connected between the input voltage and the bootstrap capacitor

Methodology Applied
Scientific EffectDiode conduction: Diode

Data Source

PatentUS12620889B2BOOT UVLO detection scheme for high voltage applications
Publication Date: 2026.05.05 NEXPERIA TECH (SHANGHAI) LTD
  • US12620889B2 patent drawing
  • US12620889B2 patent drawing
  • US12620889B2 patent drawing

AI summary

A buck converter including a high-side switch, a low-side switch and a bootstrap (BOOT), under-voltage lockout (UVLO) circuit. The BOOT UVLO circuit includes a BOOT UVLO detection element configured to compare a BOOT voltage with a switch node (SW) voltage to determine an occurrence of a BOOT UVLO event. The BOOT UVLO detection element is configured to output an UVLO signal (UVLO_Z), in case of the BOOT UVLO event. The BOOT UVLO circuit further includes a logic gate configured to receive the UVLO_Z and a high-side ON, (HSON) signal, the HSON signal is for controlling a switching of the high-side switch. The logic gate is configured to negate the HSON signal when receiving the UVLO_Z while the HSON signal is ON, to thereby immediately switch OFF the high-side switch when the HSON signal is ON.