Bootstrap Voltage Recovery Circuit for Cascode Switch Protection

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Solution Overview

Problem

Semiconductor devices face challenges in recovering voltage quickly during ultra-low power modes and brown-out conditions, where voltages exceed the device's technology limits, risking damage to gate oxides due to high back bias and voltage transients.

Innovation Solution

The implementation of voltage recovery circuitry that boosts a cascoded switch by providing a bias that ramps at the same rate as the recovered voltage, maintaining constant gate-source voltage and preventing damage, while enabling devices to operate during power mode transitions and power-on reset.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If voltage recovery is performed rapidly during brown-out conditions, then device wakeup speed is improved, but gate oxide damage risk increases due to voltages exceeding technology limits

Engineering Contradiction:
Improvevoltage recovery speedVSAvoidgate oxide damage
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

A bootstrap circuit is introduced as an intermediary voltage recovery mechanism that operates independently of the main power supply. The bootstrap circuit uses a pump capacitor to generate and apply voltage to the cascoded switch, enabling controlled voltage recovery that prevents gate oxide damage while achieving rapid wakeup from ultra-low power modes

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The pump capacitor is pre-charged to a voltage higher than the main power supply voltage before brown-out conditions occur. This preliminary charging allows the bootstrap circuit to immediately supply voltage during recovery, enabling fast wakeup without subjecting the gate oxide to damaging voltage transients

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If high back bias is applied to achieve ultra-low power modes, then power consumption is reduced, but device reliability deteriorates due to voltages beyond oxide design limits

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The bootstrap circuit acts as a protective intermediary that mediates between the high back bias requirements for ultra-low power operation and the gate oxide voltage limits. By controlling voltage application through the pump capacitor and cascoded switch, the circuit enables deep sleep modes while preventing reliability-degrading voltage transients

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the voltage parameters dynamically by using a pump capacitor that can be charged to different voltage levels depending on operational mode. During ultra-low power modes, the capacitor maintains a voltage that enables deep discharge while the bootstrap circuit ensures that voltage recovery stays within safe oxide limits

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9627964B1Systems and methods for recovering voltage beyond device limits
Publication Date: 2017.04.18 NXP USA INC
  • US9627964B1 patent drawing
  • US9627964B1 patent drawing
  • US9627964B1 patent drawing

AI summary

A voltage recovery circuit in an integrated circuit is provided. The voltage recovery circuit includes a bootstrap circuit coupled to a cascode switch circuit. The bootstrap circuit includes a first transistor coupled in series to a second transistor, a resistive element is coupled between the second transistor and an output of the voltage recovery circuit, and a capacitive element is coupled between control electrodes of the first and second transistors and the output. The cascode switch circuit includes a third and fourth transistor coupled in series. The third transistor includes a current electrode coupled to receive a first input voltage, and a control electrode coupled to the control electrodes of the first and second transistors. The fourth transistor includes a current electrode coupled to the output, and a control electrode coupled to a current electrode of the second transistor and a terminal of the resistive element.