Bootstrapped Push-Pull Buffer Circuit for Low-Voltage High-Frequency Signals
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Solution Overview
Problem
Conventional buffer circuits for high-frequency signals, such as clock signals, face issues with power consumption and unwanted harmonics, and are complex, especially when supply voltages are reduced, leading to undesirable variations in frequency, amplitude, and phase of the clock signal.
Innovation Solution
A buffer circuit incorporating a capacitive network that generates bootstrapped signals to drive a push-pull stage, allowing for a full-range voltage swing without clipping, even at low supply voltages, using NMOS and PMOS transistors in a class AB mode of operation, which reduces power consumption and minimizes harmonic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional buffer circuits are used to drive high-frequency signals, then signal buffering capability is provided, but power consumption increases and unwanted harmonics are generated
Solution Approach 1:
The buffer circuit is divided into multiple push-pull stages, each handling a portion of the signal driving task. This segmentation allows each stage to operate more efficiently with reduced power consumption while maintaining signal integrity and minimizing harmonic generation through distributed signal driving.
Solution Approach 2:
The circuit employs class AB mode of operation for the push-pull stages, which changes the operating parameters to reduce power consumption compared to class A operation. Additionally, the use of bootstrapped signals dynamically adjusts biasing parameters to optimize performance across different signal conditions, reducing both power consumption and harmonic distortion.
2Use of energy by stationary object
If supply voltage is reduced to lower power consumption, then overall power consumption decreases, but buffer circuit complexity increases and signal clipping occurs
Solution Approach 1:
The bootstrapped signal generation dynamically adjusts the biasing and operating conditions of the push-pull stages based on the input signal characteristics. This dynamic adaptation allows the circuit to maintain full voltage swing capability and avoid clipping even when supplied with reduced voltage, while the complexity is managed through systematic bootstrapping techniques rather than complex circuit topologies.
3Use of energy by stationary object
If supply voltage is reduced to lower power consumption, then power consumption decreases, but voltage swing range is limited causing signal clipping
Solution Approach 1:
Bootstrapped signals serve as intermediaries that extend the effective voltage swing range of the push-pull stages. By using capacitive coupling and active biasing through the bootstrapped signals, the circuit achieves full voltage swing capability without requiring a proportionally high supply voltage, thus maintaining signal strength while reducing power consumption.
4Ease of operation
If series-connected inverters are used for buffering, then buffering is achieved, but high-frequency harmonics are generated causing interference
Solution Approach 1:
Instead of using inverting stages (inverters) that inherently generate square wave outputs rich in harmonics, the invention uses push-pull stages that can be configured to preserve the sinusoidal nature of the input signal. This inverted approach—using non-inverting push-pull configuration with proper biasing—maintains signal waveform purity while achieving buffering capability, thereby reducing high-frequency harmonic generation.
Data Source
AI summary
A buffer circuit includes a biasing circuit operable to generate first and second biasing signals. A capacitive network includes an input adapted to receive an input signal and the capacitive network is operable responsive to the input signal to generate first and second bootstrapped signals. A push-pull stage includes first and second control inputs and an output. The push-pull stage is coupled to the biasing circuit to receive the first and second biasing signals on the first and second control inputs, respectively, and is coupled to the capacitive network to receive the first and second bootstrapped signals on the first and second control inputs, respectively. The push-pull stage is operable to generate a buffered output signal on the output responsive to the first and second bootstrapped signals.