Bootstrapped Input Buffer for Fast Wideband RF Sampling
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Solution Overview
Problem
Designing analog-to-digital converters (ADCs) that meet both high speed and performance requirements, particularly in applications involving wide bandwidth RF signals, is challenging due to the need for fast sampling and accurate conversion of high-frequency input signals, which demands quick turn-on times for sampling switches and efficient input buffering.
Innovation Solution
The implementation of a bootstrapped switching circuit with a positive feedback loop and a jump start circuit to accelerate the turn-on time of sampling switches, combined with an input buffer using a push-pull architecture and level shifters to ensure efficient signal processing and minimize distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional switching circuits are used in ADCs, then the circuit complexity is low, but the turn-on time is too slow to meet high-speed sampling requirements
Solution Approach 1:
The bootstrapped switching circuit pre-charges the gate capacitance of the sampling switch before the actual sampling operation. By using a boot capacitor connected through a switch to the gate node, the circuit prepares the switching element in advance, enabling extremely fast turn-on time (sub-100ps) when the sampling phase begins, thus resolving the speed limitation without requiring overly complex circuitry.
Solution Approach 2:
The bootstrapped circuit employs a feedback mechanism where the output voltage of the buffer is fed back through the boot capacitor to the gate of the sampling switch. This feedback loop automatically adjusts the gate voltage to maintain optimal switching performance, enabling fast turn-on while keeping the circuit design relatively simple and manageable.
2Speed
If fast switching is implemented to meet high-speed requirements, then the sampling speed improves, but signal distortion and non-linearities increase
Solution Approach 1:
The input buffer circuit changes the operating parameters of the sampling switch dynamically. By adjusting the gate voltage through the bootstrapped mechanism, the switch operates in optimal regions that enable both fast switching and linear behavior. The buffer also adjusts its output impedance and voltage levels to minimize distortion during the rapid transition phases, thus maintaining signal accuracy at high sampling speeds.
Solution Approach 2:
The circuit employs dynamic operation where the sampling switch transitions rapidly between on and off states controlled by clock signals. The bootstrapped mechanism dynamically adjusts the gate voltage during switching transitions, and the push-pull buffer dynamically responds to load conditions. This dynamic behavior enables the circuit to achieve high sampling speeds while maintaining signal fidelity through adaptive control during critical transition periods.
3Adaptability or versatility
If wide bandwidth RF signals are processed, then the application versatility improves, but the requirement for fast turn-on and low distortion becomes more stringent
Solution Approach 1:
The bootstrapped switching circuit pre-charges the gate capacitance before sampling wide bandwidth RF signals. This preliminary action ensures that when sampling begins, the switch can turn on instantly regardless of the signal frequency content, enabling the ADC to handle wide bandwidth RF signals (up to several GHz) without compromising turn-on speed. The boot capacitor stores energy ready for immediate transfer to the gate node.
Solution Approach 2:
The input buffer adjusts its operating parameters dynamically to accommodate wide bandwidth RF signals. By changing the bias conditions and voltage levels through the bootstrapped mechanism, the circuit maintains optimal performance across a wide frequency range. The buffer's push-pull architecture allows it to drive the sampling switch with appropriate voltage swings for different signal frequencies, enabling versatile RF signal processing while meeting stringent speed requirements.
Data Source
AI summary
The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.


