Bootstrapped Input Buffer for High-Speed RF ADC Sampling
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Solution Overview
Problem
Designing analog-to-digital converters (ADCs) that meet both high speed and performance requirements, particularly in applications involving wide bandwidth RF signals, is challenging due to the need for fast sampling and accurate conversion of high-frequency input signals, which demands efficient input circuitry that can handle gigahertz frequencies and high sampling rates.
Innovation Solution
The implementation of a bootstrapped switching circuit with a jump start circuit and input buffer design, utilizing a positive feedback loop and level shifters, ensures quick turn-on of the sampling switch and minimizes non-linearity, enabling efficient conversion of high-speed RF signals in ADCs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional switching circuits are used for high-speed sampling, then the circuit complexity is low, but the sampling speed and accuracy deteriorate at gigahertz frequencies
Solution Approach 1:
The bootstrapped circuit performs preliminary action by pre-charging the sampling capacitor and pre-positioning the switch in the on-state before the actual sampling event. The level shifters pre-adjust voltage levels to ensure the switch is ready for immediate fast operation, eliminating delays during the sampling process itself.
Solution Approach 2:
The bootstrapped switching circuit employs feedback mechanisms where the output voltage is fed back to control the gate voltage of the switch. This feedback loop ensures the switch remains in the optimal on-state during sampling, maintaining low on-resistance and high speed performance while reducing distortion.
2Productivity
If fast sampling is implemented to meet high-speed requirements, then the sampling rate increases, but signal accuracy and linearity worsen
Solution Approach 1:
The circuit dynamically changes voltage parameters using bootstrapping techniques. The gate voltage is boosted above the source voltage during sampling, and the source voltage itself is bootstrapped to follow the input signal. These parameter changes maintain the switch in deep triode region, minimizing non-linearity and distortion even at high sampling rates.
Solution Approach 2:
The bootstrapped capacitor acts as an intermediary element that transfers and maintains the voltage relationship between different nodes. It mediates the voltage levels to ensure the switch operates in the optimal region, preserving signal accuracy while enabling fast switching action.
3Loss of time
If the sampling switch turn-on time is reduced for high-speed operation, then the sampling speed improves, but non-linearity and distortion increase
Solution Approach 1:
The level shifter circuit performs preliminary action by pre-positioning the gate voltage to ensure the switch is already biased in the optimal region before switching begins. This preliminary biasing reduces the actual turn-on time required while maintaining linear operation throughout the switching transition.
Solution Approach 2:
The bootstrapped feedback mechanism continuously adjusts the gate voltage to maintain the switch in the optimal operating region during the entire switching process. This feedback ensures that even during the rapid turn-on transition, the switch operates with minimal non-linearity and distortion.
Data Source
AI summary
The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.