Bootstrapped Single-Conductivity Logic for Rail-to-Rail Output
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Single conductivity type logic circuits face challenges with high static power dissipation and limited rail-to-rail output, which restricts cascading and manufacturing cost benefits due to dependence on depletion or enhancement transistors requiring multiple masking and lithographic processes.
Innovation Solution
A logic assembly with a series arrangement of switches and an output boosting circuit using capacitive means and bootstrapping to achieve rail-to-rail output, reducing manufacturing costs by utilizing single threshold and single conductivity type elements, and enabling cascading of logic gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a depletion transistor is used as load device in single conductivity type logic, then the logic circuit can be realized with single conductivity type transistors, but the circuit exhibits high static power dissipation and limited output voltage range
Solution Approach 1:
The patent changes the operating parameters of the transistor by using diode-connected transistors with specific sizing ratios (e.g., 2:1 or 3:1) to achieve both low power dissipation and adequate output voltage range while maintaining single conductivity type fabrication
2Reliability
If the threshold voltage is chosen to be 1/4 of Vdd to minimize sub-threshold leakage, then leakage current is reduced, but the output voltage range is limited to maximum 3/4 Vdd which prevents full transistor opening in cascaded gates
Solution Approach 1:
The patent applies preliminary action by pre-charging capacitive loads before the main switching action, and using diode-connected transistors to pre-establish voltage levels that enable subsequent stages to achieve full rail-to-rail output swing
Solution Approach 2:
The patent introduces diode-connected transistors as intermediary elements that mediate between the threshold voltage constraint and the required output swing, allowing the output to exceed Vdd-VT through charge pumping and voltage boosting mechanisms
3Ease of manufacture
If diode-connected transistors are used to achieve single threshold and single conductivity type logic, then manufacturing cost is reduced, but the output voltage reaches only Vdd-VT which is insufficient for rail-to-rail output
Solution Approach 1:
The patent merges multiple diode-connected transistors in series or parallel configurations to achieve voltage boosting, where the combined effect of multiple transistor voltage drops or charge storage enables the output to reach rail-to-rail levels while maintaining single threshold fabrication
Solution Approach 2:
The patent transitions from a single-transistor voltage determination to a multi-transistor or multi-capacitor system that operates in an additional dimensional space, using charge pumping and voltage multiplication to achieve output levels beyond the single transistor limitation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides reduced power dissipation and rail-to-rail output, enhancing manufacturing efficiency and allowing complex cascaded logic constructions like shift registers and counters.
Implementation Method 1
a capacitive means for enabling supply of an additional charge to the output of said logic assembly
Implementation Method 2
a bootstrapping circuit for enabling an additional supply of charge to a first end of said capacitive means, resulting in a boosted voltage at a second end of said capacitive means
Data Source
AI summary
A logic assembly (400) is composed from circuit elements of a single threshold and single conductivity type and comprises a logic circuitry (410) having at least a set of switches each having a main current path and a control terminal. The main current path forms a series arrangement having first and second conducting terminals coupled to power supply lines. The main current paths being coupled to a common node that forms an output of logic assembly (400). The control terminals of said switches being coupled to clock circuitry for providing mutually non-overlapping clock signals to said control terminal. The logic assembly further comprises an output boosting circuit (420) for boosting the output of said logic assembly (400) including a capacitive means (421) for enabling supply of additional charge to the output of said logic assembly (400). It further includes a bootstrapping circuit (422) for enabling an additional supply of charge to a first end of said capacitive means, resulting in a boosted voltage at a second end of said capacitive means.