Bootstrapped Sampling Switch for Above-Supply Voltage Inputs

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Solution Overview

Problem

Existing voltage sampling circuits are unable to accurately sample input voltages higher than the supply voltage due to the presence of a body diode, which prevents sampling of voltages above the supply voltage used to bias the n-well, and they also suffer from varying switch-on resistance.

Innovation Solution

A bootstrapped voltage sampling system using a voltage sampling circuit with NMOS transistors, voltage charging circuits, and a control circuit that employs non-overlapping pulse signals to maintain a constant switch-on resistance and sample input voltages higher than the supply voltage, utilizing a diode stack to limit the gate-to-source voltage and prevent transistor breakdown.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a body diode (n-well to p+) is present in the sampling circuit, then the circuit can be manufactured with standard CMOS processes, but the circuit cannot sample input voltages higher than the supply voltage

Engineering Contradiction:
ImprovemanufacturabilityVSAvoidvoltage sampling range
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

A bootstrapping capacitor is introduced as an intermediary element between the input voltage and the sampling circuit. This capacitor couples the input signal while allowing the circuit to reference a different voltage level (VDD + VDD), thereby enabling sampling of voltages above the supply voltage without modifying the standard CMOS body diode structure

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The circuit transitions from a single-rail voltage reference (VDD) to a dual-rail voltage reference system (VDD and VDD + VDD). By creating a second voltage dimension through the bootstrapping mechanism, the circuit gains the ability to sample higher voltages while maintaining compatibility with standard manufacturing processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If a simple MOS FET switch is used for voltage sampling, then the circuit complexity is reduced, but the switch-on resistance varies with voltage changes

Engineering Contradiction:
Improvecircuit complexityVSAvoidswitch-on resistance stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The bootstrapping mechanism implements a feedback loop where the voltage at the gate of the sampling switch is dynamically adjusted based on the input voltage level. The bootstrapping capacitor transfers charge to maintain a constant gate-to-source voltage difference, thereby stabilizing the switch-on resistance despite variations in input voltage

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The bootstrapping capacitor is pre-charged to a specific voltage level before the sampling operation begins. This preliminary charging action establishes the correct gate voltage condition in advance, ensuring that the switch-on resistance remains constant throughout the sampling process without requiring complex real-time adjustment circuits

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7940091B1Bootstrapped switch for sampling voltages beyond the supply voltage
Publication Date: 2011.05.10 ANALOG DEVICES INT UNLTD CO
  • US7940091B1 patent drawing
  • US7940091B1 patent drawing
  • US7940091B1 patent drawing

AI summary

Methods and apparatus for sampling an input voltage and apparatus incorporating the same are disclosed. An input voltage sampling apparatus includes a voltage sampling circuit coupled to the input voltage and configured to produce a sampled input voltage at an output terminal, and a voltage charging circuit coupled to the voltage sampling device and producing a first charged voltage on a first charged voltage output terminal and a second charged voltage on a second charged voltage output terminal. A voltage charging enabling circuit is coupled to the voltage charging circuit, the voltage sampling device via the first connection, and a power supply voltage. Further, the input voltage sampling apparatus includes a control circuit coupled to the voltage sampling circuit, the voltage charging circuit, and the power supply voltage, ground, third and fourth pulse signals. The first and third pulse signals are non-overlapping with the second and fourth pulse signals. The first pulse signal is delayed on the rising edge of the third pulse signal and the second pulse signal is delayed on the rising edge of the fourth pulse signal. The voltage sampling apparatus is capable of sampling an input voltage that is higher than the power supply voltage.