Bootstrapped Switch Circuit With Parallel Capacitor Boosting

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Solution Overview

Problem

The operating speed of conventional bootstrapped switches is limited due to the requirement that both switches must be turned on before the input signal can be bootstrapped to the control terminal of the NMOS transistor.

Innovation Solution

A switch circuit design incorporating a first capacitor and a switch group that charges during one phase and connects in parallel with a bootstrap capacitor during another phase, enhancing the voltage boost and reducing the time required for signal bootstrapping to the control terminal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If both switches 103 and 104 are turned on to enable signal bootstrapping in conventional bootstrapped switches, then the bootstrap capacitor can be charged and the control terminal voltage can be boosted, but the operating speed is limited due to the sequential switching requirement

Engineering Contradiction:
Improveoperating speedVSAvoidtime for signal bootstrapping
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The first capacitor is pre-charged to a first voltage level before the switching operation. When the clock signal transitions to the first level, the first capacitor is already ready to connect in parallel with the bootstrap capacitor, eliminating the need to charge it during the critical switching path. This preliminary charging action resolves the time delay issue by preparing the charge source in advance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit dynamically switches between different capacitor configurations based on the clock signal level. When the clock is at the first level, the first capacitor connects in parallel with the bootstrap capacitor to provide enhanced voltage boosting. When the clock is at the second level, the capacitors are reconfigured for the next charging cycle. This dynamic reconfiguration optimizes both speed and voltage boost.

Inventive Principle:
Principle #15Dynamics

2Strength

If a bootstrap capacitor is used to boost the control terminal voltage, then the switch can achieve proper turn-on voltage, but the voltage boost is insufficient and the bootstrapping process takes too long

Engineering Contradiction:
Improvevoltage boost capabilityVSAvoidtime to achieve voltage boost
Core Design Contradiction:
StrengthVSLoss of time

Solution Approach 1:

The first capacitor is connected in parallel with the bootstrap capacitor when the clock signal is at the first level. This merging of two capacitors combines their charge storage capabilities, providing a stronger voltage boost to the control terminal than the bootstrap capacitor alone could achieve. The combined capacitance delivers both higher voltage boost and faster charging.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The first capacitor is pre-charged to a first voltage level during the phase when the clock is at the second level, before it is needed for the voltage boost. This preliminary charging ensures that when the voltage boost is required, the first capacitor is already fully charged and ready to contribute immediately, reducing the time to achieve the necessary voltage level.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The switch circuit achieves faster operating speed by boosting the voltage across the bootstrap capacitor, thereby reducing the time to switch from off to on.

Implementation Method 1

a first capacitor (Ca1) having two terminals, which are respectively a first node (N1) and a second node (N2)

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20250247088A1Switch circuit
Publication Date: 2025.07.31 REALTEK SEMICON CORP
  • US20250247088A1 patent drawing
  • US20250247088A1 patent drawing
  • US20250247088A1 patent drawing

AI summary

A switch circuit has an input terminal and an output terminal and includes a first capacitor, a second capacitor, five switches, and a switch group. Two terminals of the first capacitor are a first node and a second node. Two terminals of the second capacitor are a third node and a fourth node. The switch group is coupled to the first node, the second node, the third node, and the fourth node. The switch circuit is turned on or off according to a clock. When the clock is at a first level, the switch group couples the third node and the fourth node to the second node and the first node respectively. When the clock is at a second level, the switch group couples the third node and the fourth node to a first voltage and a second voltage respectively. The first level is different from the second level.