Bootstrapped MOSFET Switching Circuit for Low-Leakage Cell Sensing
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Solution Overview
Problem
Battery management systems face challenges in measuring voltages across individual cells in a battery stack, particularly when operating within a wide range of common mode voltages, as leakages through switches in traditional differential analog multiplexers can cause errors.
Innovation Solution
A bootstrapped switching circuit is introduced, comprising positive and negative output nodes, input nodes, and switches configured with MOSFETs of opposite types in series. This circuit uses bootstrapped level shifters to provide control signals to the switches, eliminating the need to determine the lower input potential and minimizing high voltage components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complementary T-switches are used in a high voltage AMUX to avoid leakages, then switching reliability is improved, but device complexity increases due to requiring many high voltage components and circuits to determine the lower input potential
Solution Approach 1:
Instead of using complementary T-switches that require determining the lower input potential, the patent inverts the approach by using a single switch with a floating gate that is bootstrapped to track the higher input potential. This eliminates the need for complex lower-potential detection circuits and complementary switch arrangements, thereby reducing device complexity while maintaining switching reliability
Solution Approach 2:
The patent extracts the gate control function from the traditional complementary switch arrangement and implements it as a separate bootstrapped capacitor network. The floating gate is isolated from direct connection to input potentials and is instead controlled by the bootstrapping circuitry, separating the switching function from the potential detection function and simplifying the overall circuit structure
2Device complexity
If traditional switches are used in a differential analog multiplexer, then device simplicity is maintained, but measurement precision deteriorates due to leakages causing errors in input-to-output differential signal transfer
Solution Approach 1:
The patent inverts the traditional switch configuration by using a single switch instead of complementary T-switches. The floating gate topology, when combined with bootstrapping, achieves low leakage performance while maintaining circuit simplicity, thereby resolving the trade-off between device simplicity and measurement precision
Solution Approach 2:
The bootstrapped floating gate switch is self-regulating in terms of leakage prevention. The gate voltage automatically tracks the higher input potential through the bootstrapping mechanism, creating a naturally low-leakage state without requiring external control circuits or complex switching arrangements, thus maintaining both simplicity and precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The bootstrapped switching circuit effectively prevents leakage through switches, reducing errors in differential signal transfer and minimizing the use of high voltage components, thus enhancing the accuracy and efficiency of battery management systems.
Implementation Method 1
a first level shifter capacitor connected between a drain of the first level shifter MOSFET and a first output of a respective clock signal circuit, the drain of the first level shifter MOSFET connected to a gate of the second level shifter MOSFET
Data Source
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AI summary
This disclosure relates to a bootstrapped switching circuit. Example embodiments include a bootstrapped switching circuit (100) comprising: a positive output node (109+); a negative output node (109-); a first input node (106a) configured to receive a first input voltage (Vin1); a second input node (106b) configured to receive a second input voltage (Vin2). First, second third and fourth switches (101-104) are coupled between the input and output nodes (106a, 106b, 109+, 109-). A first negative bootstrapped level shifter (107a) and a first positive bootstrapped level shifter (107b) coupled between the first input node (106a) and a first clock signal circuit (110a) provide control signals to the first and second switches (101, 102). A second negative bootstrapped level shifter (108a) and a second positive bootstrapped level shifter (108b) coupled between the second input node (106b) and a second ground referenced supply line (11 0b) provide control signals to the third and fourth switches (103, 104). Each of the first, second, third and fourth switches (101, 102, 103, 104) comprise first and second MOSFETs (201a, 201b, 202a, 202b, 203a, 203b, 204a, 204b) of an opposite type in a series connected arrangement.