Borderless Display Interconnect Layout for Narrow Inactive Bezels
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Solution Overview
Problem
Electronic devices with displays often have overly large and unsightly inactive border areas, which can detract from the overall appearance and functionality of the device.
Innovation Solution
The implementation of interconnect substrates with outwardly facing contacts that are electrically shorted to inwardly facing contacts, such as metal pillars, allows for the routing of signals directly to the pixels or pixel driver circuits, minimizing the need for large inactive border areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If traditional display routing methods are used, then signal routing is simple, but inactive border areas become overly large and unsightly
Solution Approach 1:
The patent introduces a third dimension by using vertically extending metal pillars (via structures) to route signals from the display panel front surface to the back surface. This vertical routing path eliminates the need for large lateral border areas, allowing the active display area to extend to the edges while maintaining proper signal connection to driver circuits located on the panel backside.
Solution Approach 2:
The patent embeds metal pillars (conductive via structures) within the display panel substrate layers. These nested conductive structures are integrated into the existing panel architecture, allowing signal routing functionality to be incorporated within the panel thickness rather than requiring external border space.
2Area of stationary object
If interconnect substrates with metal pillars are used, then inactive border areas are reduced, but manufacturing complexity increases
Solution Approach 1:
The patent divides the signal routing function into discrete metal pillar structures that can be independently formed and positioned. Each pillar serves as a separate interconnect element that can be manufactured using standard semiconductor via formation techniques, making the complex routing function manageable through modular fabrication steps.
Solution Approach 2:
The patent uses metal pillars as intermediary structures that bridge the display panel front surface (where pixels are located) and the back surface (where driver circuits are located). These intermediary via structures enable signal transmission through the panel substrate without requiring complex lateral routing paths or large border areas.
3Productivity
If signals are routed directly to pixels through metal pillars, then operational efficiency is improved, but device complexity increases
Solution Approach 1:
The patent replaces traditional mechanical/lateral signal routing paths with vertical electrical conduction paths through metal pillars. This substitution of routing methodology enables more direct and efficient signal transmission from driver circuits to pixels, improving operational efficiency while using well-established semiconductor fabrication techniques.
Data Source
AI summary
An electronic device display may have pixels formed from crystalline semiconductor light-emitting diode dies, organic light-emitting diodes, or other pixel structures. The pixels may be formed on a display panel substrate. A display panel may extend continuously across the display or multiple display panels may be tiled in two dimensions to cover a larger display area. Interconnect substrates may have outwardly facing contacts that are electrically shorted to corresponding inwardly facing contacts such as inwardly facing metal pillars associated with the display panels. The interconnect substrates may be supported by glass layers. Integrated circuits may be embedded in the display panels and/or in the interconnect substrates. A display may have an active area with pixels that includes non-spline pixels in a non-spline display portion located above a straight edge of the display and spline pixel in a spline display portion located above a curved edge of the display.


