Boron-Doped Si Cap Layer for Strained SiGe Substrates

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Solution Overview

Problem

High Ge concentration in epitaxial SiGe layers of semiconductor devices leads to strain relaxation and wavy top surfaces, negatively impacting device performance and subsequent manufacturing processes.

Innovation Solution

A manufacturing method involving a boron-doped Si cap layer formed on an epitaxial structure with a high Ge concentration, which reduces strain relaxation and maintains a flat surface, enhancing device performance and manufacturing process efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the Ge concentration in the epitaxial SiGe layer is increased to improve device performance, then the strain stress is increased, but strain relaxation and wavy top surface occur

Engineering Contradiction:
Improvedevice performanceVSAvoidstrain relaxation
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies parameter changes by doping the cap layer with boron to alter its physical properties. The boron concentration in the cap layer is specifically controlled to be higher than 5×10^20 atoms/cm³, which changes the stress characteristics of the cap layer and enables it to compensate for strain relaxation in the high-Ge-content epitaxial SiGe layer, thereby maintaining both high device performance and structural stability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite structure consisting of the epitaxial SiGe layer with high Ge concentration (≥45%) and a boron-doped cap layer. This composite material system combines the high strain stress benefit of high-Ge SiGe with the strain relaxation compensation capability of the boron-doped cap layer, resolving the contradiction between performance improvement and structural stability

Inventive Principle:
Principle #40Composite materials

2Reliability

If the Ge concentration in the epitaxial SiGe layer is increased to improve device performance, then the strain stress is increased, but the top surface becomes wavy

Engineering Contradiction:
Improvedevice performanceVSAvoidtop surface flatness
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent changes the chemical composition parameter of the cap layer by introducing boron doping with concentration higher than 5×10^20 atoms/cm³. This parameter change modifies the stress state of the cap layer, enabling it to counteract the forces causing surface waviness and maintain a flat top surface even when the underlying epitaxial SiGe layer has high Ge concentration

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The boron-doped cap layer serves as a preliminary countermeasure against surface waviness. By pre-establishing a cap layer with controlled boron concentration before subsequent processing steps, the patent proactively prevents top surface deformation that would otherwise occur due to the high Ge concentration in the epitaxial SiGe layer

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces strain relaxation by 33% to 5% and ensures a flat top surface, improving device performance and facilitating subsequent processes by maintaining superior electrical properties and preventing agglomeration.

Implementation Method 1

the strain stress generated to the channel region of the semiconductor device, such as a metal-oxide semiconductor (MOS) transistor device, may efficiently improve the device performance

Methodology Applied
Scientific EffectStrain stress compensation: Stress Relaxation

Implementation Method 2

the first cap layer is doped with boron for forming a flat top surface of the first cap layer

Methodology Applied
Scientific EffectDoping effect: Dopants

Data Source

PatentUS9064893B2Gradient dopant of strained substrate manufacturing method of semiconductor device
Publication Date: 2015.06.23 UNITED MICROELECTRONICS CORP
  • US9064893B2 patent drawing
  • US9064893B2 patent drawing
  • US9064893B2 patent drawing

AI summary

A manufacturing method of a semiconductor device is provided. The method includes at least the following steps. A gate structure is formed on a substrate. An epitaxial structure is formed on the substrate, wherein the epitaxial structure comprises SiGe, and the Ge concentration in the epitaxial structure is equal to or higher than 45%. A first cap layer is formed on the epitaxial structure, wherein the first cap layer comprises Si. The first cap layer is doped with boron for forming a flat top surface of the first cap layer.