Boron-Doped SiGe Epitaxy for Selective Low-Temperature Deposition

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Solution Overview

Problem

The scaling of semiconductor devices faces challenges in manufacturing defect-free active regions and selectively depositing doped semiconductor material, especially at lower temperatures due to limited thermal budgets.

Innovation Solution

A method for epitaxially growing boron-doped silicon germanium layers by introducing silicon, germanium, and boron precursors, along with a carrier gas, into a reactor chamber, allowing for selective deposition on a monocrystalline surface while etching parasitic growth on dielectric surfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional device scaling techniques are used, then speed and density of integrated circuits are improved, but manufacturing of defect-free active regions becomes difficult

Engineering Contradiction:
Improvespeed of integrated circuitsVSAvoiddefect-free active regions
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent changes the deposition parameters by using specific temperature ranges (200-450°C), pressure conditions (10-740 Torr), and precursor flow rates to achieve high-quality semiconductor layer deposition that is free of defects while maintaining scaling benefits

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces conventional high-temperature thermal processing with low-temperature plasma-enhanced chemical vapor deposition (PECVD), substituting thermal energy with plasma energy to achieve defect-free deposition at lower temperatures

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If selective deposition of doped semiconductor material is attempted, then desired material selectivity is achieved, but deposition techniques are not well developed

Engineering Contradiction:
Improveselective deposition capabilityVSAvoidmaturity of deposition techniques
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by using selective catalysts on different substrate regions to control where doped semiconductor material deposits, enabling precise spatial control of dopant placement while using well-established CVD techniques

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces catalysts as intermediary substances that mediate between the precursor gases and the substrate surface, enabling selective deposition on specific regions while using conventional deposition equipment and processes

Inventive Principle:
Principle #24Intermediary (Mediator)

3Temperature

If semiconductor material is deposited at lower temperatures, then thermal budget constraints are satisfied, but deposition quality and control become more challenging

Engineering Contradiction:
Improvedeposition temperatureVSAvoiddeposition quality and control
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The patent changes the energy delivery mechanism from thermal to plasma-based, allowing deposition at lower temperatures (200-450°C) while maintaining or improving deposition quality through plasma activation of precursors

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes thermal energy with plasma energy to drive the deposition process, replacing the conventional thermal field with an electromagnetic plasma field that enables low-temperature, high-quality film formation

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the deposition of high-quality, defect-free boron-doped silicon germanium layers suitable for use in source, drain, and channel regions of transistors, maintaining structural integrity and achieving low surface roughness.

Implementation Method 1

introducing a silicon precursor, a germanium precursor, a boron precursor, and a carrier gas into the reactor chamber, thereby epitaxially growing a boron doped silicon germanium layer

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 2

epitaxially growing a boron doped silicon germanium layer on the monocrystalline surface

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20250157814A1Method for depositing boron containing silicon germaniuim layers
Publication Date: 2025.05.15 ASM IP HLDG BV
  • US20250157814A1 patent drawing
  • US20250157814A1 patent drawing
  • US20250157814A1 patent drawing

AI summary

Methods and devices for epitaxially growing boron doped silicon germanium layers. The layers may be used, for example, as a p-type source and/or drain regions in field effect transistors.