Borrow-Detecting Arithmetic Circuit With Fewer Internal Gates
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Solution Overview
Problem
Existing arithmetic circuits have a high number of internal circuits, which limits their operation speed and increases the area occupied, making them less efficient for semiconductor devices.
Innovation Solution
The proposed arithmetic circuit reduces the number of internal circuits by incorporating an arithmetic driving circuit and a detection circuit that generates and detects borrow digit values using fewer logic gates and transistors, specifically utilizing XNOR, XOR, and arithmetic output circuits, along with a detection output circuit with PMOS and NMOS transistors, to achieve faster operation speeds and reduced area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If existing full subtractor configurations are used, then the arithmetic circuit can perform subtraction operations, but the number of internal circuits increases, reducing operation speed and increasing area occupancy
Solution Approach 1:
The patent combines the subtraction operation and borrow detection functions into a unified arithmetic circuit structure. The detection circuit is integrated with the arithmetic driving circuit, sharing common signal paths and logic gates, thereby reducing the total number of internal circuits while maintaining both subtraction capability and borrow detection functionality.
Solution Approach 2:
The arithmetic driving circuit is designed to perform multiple functions: it executes subtraction operations on arithmetic target values and simultaneously generates intermediate results that feed into the detection circuit for borrow detection. This multi-functional design eliminates the need for separate dedicated circuits, reducing overall circuit complexity.
2Productivity
If existing full subtractor configurations are used, then the arithmetic circuit can perform subtraction operations, but the area occupied increases
Solution Approach 1:
The patent merges the subtraction execution path and the borrow detection path into a compact integrated structure. By sharing logic gates and signal routes between these functions, the physical area required for the circuit is reduced while maintaining high operation speed through optimized signal flow.
Solution Approach 2:
The detection circuit is nested within the arithmetic driving circuit structure, with the detection logic embedded in the same circuit block. This nesting allows efficient use of circuit space by placing detection functionality inside the existing arithmetic operation framework, minimizing additional area occupancy.
Data Source
AI summary
An arithmetic circuit includes an arithmetic driving circuit and a detection circuit. The arithmetic driving circuit is configured to generate an arithmetic result value based on first and second arithmetic target values. The detection circuit is configured to detect whether an upper borrow digit value occurs, by receiving the arithmetic result value as feedback.