Both-Edge Up/Down A/D Conversion for Low-Power Image Sensors
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Solution Overview
Problem
Existing A/D conversion circuits in CMOS image sensors require high operational electrical current due to frequent counting operations, which increases power consumption and limits the speed of image capture.
Innovation Solution
An A/D conversion circuit that utilizes a counter capable of performing up/down counting at both edges of a clock, allowing for switching between count modes while maintaining count values, and latching the clock signal to set LSB data, thereby reducing power consumption and maintaining counting operation duty.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If counting operations are performed frequently to increase A/D conversion speed, then productivity is improved, but use of energy increases due to higher operational electrical current
Solution Approach 1:
The counter performs counting operations at both rising and falling edges of the clock signal, utilizing periodic transitions to double the effective counting frequency without proportionally increasing power consumption. This allows the counter to complete A/D conversions faster while maintaining efficient power usage by leveraging the natural periodic nature of clock cycles.
Solution Approach 2:
The invention changes the operational parameters of the counter by enabling it to detect and respond to both edges of the clock signal rather than just one edge. This parameter change effectively doubles the counting rate without requiring a proportional increase in operational current, as the same clock signal is utilized more efficiently.
2Loss of time
If counting frequency is increased to shorten A/D conversion time, then productivity is improved, but use of energy increases
Solution Approach 1:
By utilizing both rising and falling edges of the clock signal for counting operations, the system effectively doubles the counting frequency without requiring a proportional increase in power consumption. This periodic utilization of clock edges reduces A/D conversion time while maintaining efficient energy usage.
Solution Approach 2:
The counter maintains continuous counting operation throughout both edges of the clock cycle, ensuring that no clock transitions are wasted. This continuous utilization of the clock signal maximizes the counting rate within the available power budget, reducing conversion time without excessive energy consumption.
Data Source
AI summary
An A/D conversion circuit in which a counter is made to be capable of performing counting at both edges of a clock, up/down count values can be switched while the up/down count values are held, and the duty of the counting operation is difficult to be distorted even with the both-edge counting, a solid-state image sensor, and a camera system.