Bottle-Shaped Gate Trench Transistor for Source/Drain Contact
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Solution Overview
Problem
The shrinking critical dimension in transistor structures makes it extremely difficult to form sufficient source/drain contact regions, leading to operational performance issues due to lithographic and alignment errors.
Innovation Solution
A transistor structure with a gate trench having a narrower top and a wider bottle-shaped bottom, allowing for a larger source/drain contact region, is formed by selective wet etching and conductive layer deposition, ensuring adequate contact area and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the critical dimension is shrunk to increase transistor density, then the transistor size is reduced, but the source/drain contact region width becomes insufficient
Solution Approach 1:
The patent introduces a third dimension by forming a recess in the substrate below the gate trench level. This vertical dimension allows the source/drain contact regions to extend downward, increasing their area without increasing the horizontal footprint, thus resolving the contradiction between high transistor density and sufficient contact region width.
Solution Approach 2:
The patent embeds the source/drain contact regions within the recess structure, nesting them below the gate trench. This nesting approach allows the contact regions to occupy space that would otherwise be unused, increasing contact area while maintaining the overall compact transistor structure.
2Productivity
If the source/drain contact region width is reduced to fit more transistors, then transistor density increases, but operational performance deteriorates due to lithographic and alignment errors
Solution Approach 1:
By extending the contact regions vertically into the recess, the patent increases contact area without reducing horizontal dimensions, thereby maintaining operational performance while achieving higher transistor density.
Solution Approach 2:
The recess is formed in advance before depositing the conductive layers for source/drain contacts. This preliminary action creates a pre-defined space that ensures adequate contact region dimensions are achieved before subsequent fabrication steps, reducing sensitivity to lithographic and alignment errors.
3Ease of manufacture
If a conventional straight trench structure is used, then fabrication is simpler, but the source/drain contact region area is insufficient
Solution Approach 1:
The gate trench structure is segmented into two distinct width portions: a first width at the top level and a second width at the recess level. This segmentation is achieved through selective etching processes that create different trench widths at different depths, allowing the contact regions to have sufficient area while maintaining fabrication feasibility.
Solution Approach 2:
The patent applies different local qualities to different portions of the gate trench. The upper portion has a narrower width suitable for gate control, while the lower recess portion has a wider width to accommodate adequate source/drain contact regions. This local differentiation resolves the contradiction between fabrication simplicity and contact region area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances operational performance by providing more spacious source/drain contact regions, reducing resistance, and maintaining consistent performance across transistors, while avoiding the short channel effect.
Implementation Method 1
performing a selective wet etching to enlarge the deep trench to be a gate trench including a top of a first width and a bottle-shape bottom of a second width
Data Source
AI summary
A transistor structure includes a gate trench. The gate trench includes a bottle-shape bottom. The bottle-shape bottom includes a first conductive material wider than its top. The top includes a second material in a substrate, a gate structure on the gate trench and electrically connected to the first conductive material, a source/drain doping region adjacent to the gate trench and a gate channel between the source/drain doping region.