Bottle-Shaped Word Line Structure for Memory Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices face retention performance issues due to high gate-induced drain leakage (GIDL) and small landing areas, which lead to poor retention time and contact resistance.
Innovation Solution
A memory structure with a substrate having active areas and isolation structures, featuring word lines with a bottle-shape cross-section and inclined sidewalls, where the gate dielectric is thicker on the sidewalls than on the slots and grooves, and a source/drain implant region overlapping the grooves, reducing GIDL and enhancing landing areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional word line structures are used, then manufacturing is simpler, but GIDL is high and retention performance is poor
Solution Approach 1:
The word line trench is segmented into two distinct regions: a slot portion extending from the top surface and a groove portion at the bottom. This segmentation allows different gate dielectric thicknesses in different regions, reducing GIDL at the drain end while maintaining proper gate control, thereby improving retention performance without excessive complexity
Solution Approach 2:
The gate dielectric layer is designed with non-uniform thickness: thinner at the slot top for proper gate control and thicker at the groove bottom (especially at inclined sidewalls) to reduce GIDL. This local variation in quality directly addresses the retention problem by reducing leakage in critical regions
2Productivity
If small landing areas are used, then device density increases, but contact resistance increases and overlap issues occur
Solution Approach 1:
The word line structure transitions from a conventional top-surface layout to a three-dimensional bottle-shape extending vertically into the substrate. This dimensional change allows the word line to occupy subsurface space, increasing the effective landing area for bit lines and reducing contact resistance while maintaining high device density
3Reliability
If uniform gate dielectric thickness is used, then manufacturing is easier, but GIDL cannot be effectively reduced
Solution Approach 1:
The gate dielectric thickness is locally optimized: thinner regions at the slot top provide proper gate control, while thicker regions at the groove bottom with inclined sidewalls reduce GIDL. The inclined sidewalls naturally create the thickness gradient, making the non-uniform structure achievable with standard manufacturing processes
Solution Approach 2:
The inclined sidewalls of the groove portion create a curved, bottle-shape profile that naturally transitions between thin and thick gate dielectric regions. This curvature facilitates gradual thickness variation and reduces manufacturing complexity compared to sharp transitions
Data Source
AI summary
A memory structure includes a substrate, a first word line and a first word line. The substrate has a plurality of active areas and an isolation structure surrounding the active areas. The first word line trench is formed across a first active area of the active areas and the isolation structure. The first word line trench includes a first slot and a first groove. The first slot is recessed from a top surface of the substrate. The first groove expands from a bottom of the first slot. A first sidewall is connected between the bottom of the first slot and a top of the first groove. A first word line is formed in the first word line trench. The first word line comprises a gate dielectric conformally formed on the first groove and the first slot.