Bottom Electrode Structure to Prevent Storage Node Sealing
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Solution Overview
Problem
The challenge in semiconductor memory devices is to increase memory cell density while maintaining structural reliability and preventing defects caused by sealing bottom electrode layers and capacitor dielectric layers, which is complicated by the need for uniform thickness and preventing excessive discharge and unstable performance in storage nodes.
Innovation Solution
A semiconductor device with a thin-top and thick-bottom structure for bottom electrode layers is fabricated by forming a supporting structure with multiple layers and etching processes to create asymmetric or symmetric U-shaped bottom electrode layers, ensuring uniform thickness and preventing sealing of storage node openings during deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the storage node openings are sealed during depositing the bottom electrode layer and capacitor dielectric layer, then the manufacturing process is simplified, but structural defects and functional defects occur in the storage nodes
Solution Approach 1:
The patent applies local quality by creating different thickness regions within the bottom electrode layer: a first thickness in the lower portion and a second thickness (greater than the first) in the upper portion. This non-uniform thickness distribution prevents sealing of the storage node openings while maintaining manufacturing simplicity, thereby resolving the contradiction between ease of manufacture and structural reliability.
2Reliability
If the bottom electrode layer has non-uniform thickness, then the tip effect is improved and excessive discharge is prevented, but manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent implements parameter changes by specifying different thickness parameters for different regions of the bottom electrode layer. The first thickness in the lower portion and the second thickness (greater than the first) in the upper portion are controlled through deposition parameters, enabling the desired non-uniform structure while maintaining manufacturability. This resolves the contradiction between reliability improvement through non-uniform thickness and manufacturing precision control.
Data Source
AI summary
The present disclosure provides a semiconductor device and a fabricating method thereof, including a substrate, a supporting structure and a capacitor structure. The supporting structure is disposed on the substrate, and the supporting structure includes a first supporting layer and a second supporting layer. The capacitor structure is disposed on the substrate and includes a plurality of bottom electrode layers. Each of the bottom electrode layers includes two portions extended upwardly, and one of the two portions has a first thickness between the substrate and the first supporting layer, and a second thickness between the first supporting layer and the second supporting layer, and the first thickness is greater than the second thickness.