Bottom-Gate Transistor Hard Mask for Short Channel Length

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Solution Overview

Problem

Conventional semiconductor devices with bottom-gate transistors in multiple layers face challenges in achieving sufficient electric characteristics, particularly low on-state current, due to limitations in reducing channel length while maintaining low electric resistance between the source and drain electrodes.

Innovation Solution

The solution involves a method for manufacturing bottom-gate transistors with a short channel length by forming thinner portions of the source and drain electrodes proximate to the channel formation region and using a hard mask layer to facilitate precise patterning and etching, allowing for a minute pattern opening in the conductive layer without increasing wiring resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the channel length of the bottom-gate transistor is reduced to increase on-state current, then the on-state current increases, but the thickness of the resist must be reduced which complicates the manufacturing process and risks damage during etching

Engineering Contradiction:
Improveon-state currentVSAvoidmanufacturing process complexity
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

A hard mask layer is introduced as an intermediary between the resist and the conductive layer. This hard mask layer has high etch resistance and can withstand the etching process, allowing the use of thinner resist patterns without direct exposure to harsh etching conditions. The hard mask layer serves as a protective mediator that enables precise pattern transfer while protecting the underlying structures during manufacturing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the channel length is reduced to less than 30 nm to improve electric characteristics, then the on-state current increases, but electron beam photolithography is required which increases manufacturing complexity

Engineering Contradiction:
Improveelectric characteristicsVSAvoidphotolithography process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The hard mask layer acts as an intermediary that enables conventional photolithography to achieve sub-30 nm patterns. By using the hard mask layer with its superior etch resistance and pattern definition capabilities, the patent avoids the need for electron beam lithography while still achieving the required dimensional precision for short-channel transistors.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the material parameter of the mask layer from conventional soft resist to a hard mask material with different physical and chemical properties. This parameter change in the mask layer material enables conventional photolithography to achieve the required pattern precision that would otherwise require electron beam lithography.

Inventive Principle:
Principle #35Parameter changes

3Length of moving object

If the conductive layer is made thinner to enable separation before resist removal, then the channel length can be reduced, but the electric resistance between source and drain increases

Engineering Contradiction:
Improvechannel lengthVSAvoidelectric resistance
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The hard mask layer serves as a mediator that decouples the relationship between conductive layer thickness and pattern definition capability. By using the hard mask layer for pattern transfer, the conductive layer can be optimized for electrical performance (adequate thickness for low resistance) while still achieving precise channel length control through the hard mask layer's pattern transfer function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of transistors with high on-state current and improved electric characteristics, leveraging the higher electron mobility of oxide semiconductor materials, while preventing damage to the resist layer during processing and ensuring reliable operation.

Implementation Method 1

leveraging the higher electron mobility of oxide semiconductor materials

Methodology Applied
Scientific EffectElectron mobility:

Data Source

PatentUS9281405B2Semiconductor device and method for manufacturing the same
Publication Date: 2016.03.08 SEMICON ENERGY LAB CO LTD
  • US9281405B2 patent drawing
  • US9281405B2 patent drawing
  • US9281405B2 patent drawing

AI summary

A bottom-gate transistor with a short channel length and a method for manufacturing the transistor are provided. A bottom-gate transistor with a short channel length in which portions of a source electrode and a drain electrode which are proximate to a channel formation region are thinner than other portions thereof was devised. In addition, the portions of the source electrode and the drain electrode which are proximate to the channel formation region are formed in a later step than the other portions thereof, whereby a bottom-gate transistor with a short channel length can be manufactured.