Bottom Source Substrateless Power MOSFET Fabrication
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Solution Overview
Problem
Existing semiconductor manufacturing methods for bottom source power MOSFET devices require complex processes and multiple masks, leading to potential short circuits between the drain and gate electrodes, especially when trying to achieve a substrateless thin chip configuration.
Innovation Solution
A manufacturing method that flips the semiconductor chip with the source electrode at the bottom and the drain and gate electrodes at the top, using a through via to expose the gate electrode while maintaining electrical insulation, and employing a reduced number of masks (only two) to prevent short circuits, with the process involving electroplating, molding compound deposition, and selective etching or laser drilling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If complex manufacturing processes with multiple masks are used to create bottom source power MOSFET, then the substrateless thin chip configuration can be achieved, but the risk of short circuits between drain and gate electrodes increases
Solution Approach 1:
The patent inverts the conventional MOSFET structure by placing the source electrode at the bottom surface instead of the top surface. This structural inversion allows the drain and gate electrodes to be positioned at the top surface, enabling their electrical insulation to be ensured through proper layout and insulation layer design, thereby reducing short circuit risk while achieving the substrateless thin chip configuration.
Solution Approach 2:
The patent introduces an insulation layer as an intermediary between the drain electrode and gate electrode at the top surface. This insulation layer acts as a mediator that electrically isolates the two electrodes, preventing short circuits while allowing both electrodes to access the external circuit through the top surface.
2Ease of manufacture
If conventional manufacturing processes are used for bottom source power MOSFET, then the device can be fabricated, but the manufacturing process becomes overly complex with multiple masks
Solution Approach 1:
The patent merges the formation of the source electrode with the bottom surface processing steps. By configuring the source electrode to be formed at the bottom surface during the initial manufacturing stages, the need for separate top surface source electrode formation steps and multiple masks is eliminated, significantly simplifying the manufacturing process.
Solution Approach 2:
The patent performs preliminary action by pre-configuring the source electrode at the bottom surface during early manufacturing stages. This preliminary positioning of the source electrode simplifies subsequent processing steps, as the source electrode structure is already in place and does not require complex top surface fabrication steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces the risk of short circuits and simplifies the manufacturing process by minimizing mask usage, allowing for the production of thin substrateless power MOSFET devices with the source electrode at the bottom and the drain and gate electrodes at the top, ensuring reliable electrical isolation.
Implementation Method 1
The source electrode bump is made of a metal on the exposed portion of source metal by electroplating
Implementation Method 2
The through via can be formed via a laser drilling method
Implementation Method 3
A wet or a dry etching is carried out through the opening in the first mask, etching down through the drain electrode metal layer, substrate and initial insulation layer to form the though via
Implementation Method 4
A wet or a dry etching is carried out through the opening in the first mask, etching down through the drain electrode metal layer, substrate and initial insulation layer to form the though via
Data Source
AI summary
A bottom source power metal-oxide-semiconductor field-effect transistor (MOSFET) device includes a gate electrode and a source electrode formed on an initial insulation layer on a first surface of a semiconductor chip and a drain electrode formed on a second surface of the semiconductor chip. The source electrode includes a source metal, a source electrode bump formed on the source metal and a source electrode metal layer on top of the source electrode bump. A first insulation layer covers the gate electrode. A through via aligned to the gate electrode is formed from the second surface of the chip to expose a portion of the gate electrode from the second surface.


