FinFET Gate Trench Bottom-Up Metal Fill for Seam-Free Contacts
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving higher device density, performance, and lower costs, particularly in the fabrication and design of FinFET devices, where current methods struggle with efficient gate trench filling and metal layer deposition, leading to issues like seams and increased resistance.
Innovation Solution
The method involves forming metal layers in a gate trench via a bottom-up approach, which maintains the trench width and eliminates seams associated with conformal growth, simplifying the process flow and reducing resistance by avoiding repeated etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conformal growth method is used to form metal layers in gate trench, then the metal layer thickness is uniform, but seams are formed and resistance increases
Solution Approach 1:
The patent inverts the conventional conformal growth approach by using a bottom-up deposition method where metal layers are formed from the bottom of the gate trench upward. This inversion eliminates seam formation while maintaining uniform thickness, as the metal deposits continuously from the substrate interface without the intermediate stopping and resuming operations that cause seams in conformal methods.
Solution Approach 2:
The patent applies preliminary action by first preparing the gate trench with a specific substrate surface condition and then depositing the entire metal layer thickness in a continuous bottom-up process. This preliminary preparation ensures that the metal layer forms without seams from the outset, eliminating the need for subsequent etching or repair operations that would increase resistance.
2Reliability
If repeated etching processes are used to form metal layers, then seam formation is prevented, but process complexity and resistance increase
Solution Approach 1:
The patent implements continuity of useful action by depositing the metal layer in a single continuous bottom-up operation without interruption. This continuous deposition forms uniform metal layers without seams, eliminating the need for repeated etching and redeposition cycles, thereby simplifying the overall process while maintaining reliability.
Solution Approach 2:
By inverting the deposition direction from conformal (top-down or lateral) to bottom-up, the patent achieves seam-free metal layers in a single continuous process step, avoiding the complex repeated etching operations that would otherwise be required to remove seams formed by conventional methods.
3Productivity
If gate trench width is reduced for higher density, then device density increases, but metal layer deposition becomes more difficult
Solution Approach 1:
The patent changes the deposition dimension from lateral/conformal growth to vertical bottom-up growth. This dimensional change allows uniform metal layer formation even in narrow gate trenches, as the metal deposits vertically from the substrate upward, maintaining ease of manufacture while enabling higher device density through reduced trench spacing.
Solution Approach 2:
By inverting the deposition approach to grow metal from the bottom of the trench upward rather than from the sides or top, the patent maintains ease of manufacture in narrow trenches. This bottom-up approach ensures uniform coverage regardless of trench width, supporting higher device density without compromising manufacturability.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a first gate structure over the substrate, a second gate structure over the substrate, first gate spacers, second gate spacers, first and second metal layers spanning over the first and second gate structures, first and second contact plugs extending through the first and second metal layers, respectively. The first gate structure includes a first gate dielectric, and a first work function metal layer over the first gate dielectric. The second gate structure is wider than the first gate structure, wherein the second gate structure includes a second gate dielectric, a second work function metal layer over the second gate dielectric, and a filling conductor over the second work function metal layer. The first contact plug is in contact with the first work function metal layer, and the second contact plug is in contact with the filling conductor.