Depopulated GAA Nanowire Channels via Bottom-Up Oxidation
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Solution Overview
Problem
The challenge in integrated circuit fabrication is achieving different drive currents for various circuit types using nanowire and nanoribbon transistors, as existing methods are complex or ineffective for stacked CMOS architectures, particularly in scaling below the 10 nanometer node, where traditional approaches like varying channel widths or subtractive removal of wires/ribbons are impractical.
Innovation Solution
A self-aligned bottom-up oxidation process is employed to de-populate nanowire transistor channels, allowing for modulation of drive currents by selectively oxidizing bottommost nanowires, while maintaining upper wires active, and using epitaxial source/drain structures to control leakage current, enabling the fabrication of gate-all-around integrated circuit structures with depopulated channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional approaches like varying channel widths or subtractive removal of wires/ribbons are used to achieve different drive currents, then drive current modulation is possible, but the process complexity increases and scalability below 10 nanometer node becomes impractical
Solution Approach 1:
The patent changes the physical state of selected nanowires by oxidizing them to form insulating oxide regions, thereby modulating drive current through material transformation rather than geometric modification. This approach enables drive current control without complex patterning or removal processes.
Solution Approach 2:
The patent replaces mechanical/subtractive methods (removal of wires or ribbons) with a chemical oxidation process that transforms selected nanowires into insulating regions. This substitution simplifies the fabrication process by using bottom-up material transformation instead of top-down removal techniques.
2Productivity
If the number of nanowires or nanoribbons is increased to increase device density, then capacity increases, but leakage current control becomes more difficult
Solution Approach 1:
The patent segments the channel into multiple discrete nanowires or nanoribbons, allowing selective oxidation of specific segments to create insulating barriers. This segmentation enables independent control of each channel element, facilitating leakage current suppression in high-density configurations.
Solution Approach 2:
The patent introduces oxidized nanowires as intermediary insulating structures between active channels and substrate or between adjacent devices. These oxidized regions act as mediators that block leakage paths while maintaining the high-density nanowire architecture.
3Length of moving object
If feature size is reduced to scale below 10 nanometer node, then device capacity increases, but maintaining mobility improvement and short channel control becomes challenging
Solution Approach 1:
The patent transitions from two-dimensional planar channels to three-dimensional vertically-stacked nanowire configurations. This dimensional change provides enhanced gate control over the channel from multiple directions, improving short channel control and mobility even at sub-10 nanometer feature sizes.
Solution Approach 2:
The patent applies selective oxidation to create localized insulating regions with different electrical properties within the channel structure. This local quality modification enables precise control of carrier transport and short channel effects in scaled devices without affecting the overall channel dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of transistors with variable numbers of active nanowires or nanoribbons, improving drive current modulation and reducing leakage, thus addressing the complexity of scaling and performance in nanowire and nanoribbon technologies.
Implementation Method 1
The oxidation catalyst layer promotes oxidation of the bottommost nanowires but not the uppermost nanowires, thereby enabling bottom-up channel depopulation of the nanowire transistor channels
Data Source
AI summary
Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating gate-all-around integrated circuit structures having depopulated channel structures using a bottom-up oxidation approach, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires above a substrate. The vertical arrangement of nanowires has one or more active nanowires above one or more oxidized nanowires. A gate stack is over the vertical arrangement of nanowires and around the one or more oxidized nanowires.