Bounce-Rejection Circuit for Digital Signal Synchronization

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Solution Overview

Problem

Metastability in digital systems, particularly when signals are passed between different clock domains, leads to undesirable signal bounces due to ringing lines, external noise, and mechanical bounces, causing system failures and sample errors.

Innovation Solution

A bounce-rejection circuit portion that operates on successive samples of a synchronised signal, changing the output signal only if a proportion of samples meets a threshold greater than 50%, thereby filtering out unwanted pulses and preventing system failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a synchroniser is used to pass signals between different clock domains, then signal synchronization is achieved, but signal bounces occur due to metastability

Engineering Contradiction:
Improvesignal synchronization reliabilityVSAvoidsignal bounces
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The bounce-rejection circuit performs preliminary action by examining multiple successive samples before the harmful bounce effect can propagate through the system. It proactively identifies and rejects bounces based on the majority vote of previous samples, preventing them from causing system failures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit uses feedback by continuously monitoring the output of the synchroniser and using the history of successive samples to make decisions about whether to reject the current sample. The feedback mechanism allows the system to learn from previous states and adjust its behavior accordingly.

Inventive Principle:
Principle #23Feedback

2Reliability

If delay times are built into digital systems to reduce metastability failures, then reliability improves, but system speed decreases

Engineering Contradiction:
Improvemetastability failure reductionVSAvoidsignal processing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

Instead of using excessive delay times, the invention applies partial action by examining only a limited number of successive samples (greater than 50% threshold) to make bounce rejection decisions. This partial examination provides sufficient reliability without the excessive delays that would slow down the system.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If a bounce-rejection circuit operates on multiple successive samples, then bounce rejection accuracy improves, but circuit complexity increases

Engineering Contradiction:
Improvebounce detection accuracyVSAvoidcircuit structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The circuit segments the bounce rejection function into discrete components: a sample storage element for holding successive samples, a comparison element for evaluating the majority vote threshold, and a control element for deciding whether to reject the current sample. This segmentation makes the circuit manageable and not overly complex.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240255985A1Syncroniser circuit
Publication Date: 2024.08.01 NORDIC SEMICONDUCTOR
  • US20240255985A1 patent drawing
  • US20240255985A1 patent drawing
  • US20240255985A1 patent drawing

AI summary

A circuit portion receives, at a synchroniser, a signal clocked at a first frequency and outputs a synchronised signal clocked at a second frequency to a bounce-rejection circuit portion. The bounce-rejection circuit portion operates on a plurality of successive samples of the synchronised signal and outputs an output signal. The bounce-rejection circuit portion: changes the output signal from a first value to a second value if a proportion of said plurality of successive samples having said second value is determined to meet a threshold, the threshold being greater than 50% of the plurality of successive samples; otherwise, it maintains the output signal at the first value.