Automated Boundary Scan Model Generation for ICs
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Solution Overview
Problem
Existing methods for generating boundary scan description and model files for integrated circuits are prone to errors due to manual addition of tags in fully annotated schematics, which can lead to inaccuracies in identifying critical features of the boundary scan architecture.
Innovation Solution
A method and apparatus for processing schematic data to generate a hierarchy of cells associated with a boundary scan chain, where ignore cells are pruned, short cells are replaced with direct connections, and shadow nets are added to each net, resulting in a flattened chain with only leaf cells, which are then used to create a boundary scan description language (BSDL) file and JTAG model.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual tagging is used in fully annotated schematics to extract boundary scan information, then the boundary scan description can be generated, but errors and inaccuracies occur in identifying critical features
Solution Approach 1:
The system performs self-service by automatically extracting boundary scan information from schematic data without requiring manual tagging. The computer reads the schematic data, identifies boundary scan cells and their connections, and generates the BSDL file autonomously, eliminating human error in the tagging process.
Solution Approach 2:
The manual mechanical process of adding tags to schematics is replaced with an automated computer-based system. The computer reads schematic data, processes it through algorithms to identify boundary scan architecture features, and generates the description file, substituting human manual work with automated computational processes.
2Productivity
If manual tagging is used to identify critical features, then boundary scan information can be extracted, but the process is time-consuming and error-prone
Solution Approach 1:
The system performs self-service by automatically extracting boundary scan information from schematic data without requiring manual tagging. The computer reads the schematic data, identifies boundary scan cells and their connections, and generates the BSDL file autonomously, eliminating human error in the tagging process.
Solution Approach 2:
The manual mechanical process of adding tags to schematics is replaced with an automated computer-based system. The computer reads schematic data, processes it through algorithms to identify boundary scan architecture features, and generates the description file, substituting human manual work with automated computational processes.
3Reliability
If all cells in the schematic are included in the boundary scan chain, then comprehensive coverage is achieved, but irrelevant cells increase complexity and reduce accuracy
Solution Approach 1:
The system extracts only the relevant boundary scan cells from the complete schematic data. It identifies and extracts cells that are part of the boundary scan architecture while excluding irrelevant cells, creating a streamlined and accurate boundary scan model without unnecessary complexity.
Solution Approach 2:
The system applies local quality by treating different cells differently based on their relevance to the boundary scan architecture. Relevant cells are included in the boundary scan chain with appropriate properties, while irrelevant cells are excluded, ensuring each cell's inclusion is justified by its functional role.
Data Source
AI summary
An aspect of the invention relates to a method, apparatus, and computer-readable medium for processing schematic data for an integrated circuit having a boundary scan architecture. A path through cells of the schematic data to generate a hierarchy of cells associated with a boundary scan chain. Each ignore cell in the hierarchy is pruned. Each short cell in the hierarchy is replaced with a direct connection. A shadow net is added to each net of the hierarchy. Each of the cells in the hierarchy is flattened in a bottom-up fashion.


