Bounded Floating-Point Format with Error Tracking Fields

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Solution Overview

Problem

Current floating-point arithmetic systems, as defined by standards like IEEE 754-2008, do not effectively calculate or retain error information, leading to substantial accumulated rounding error and catastrophic cancellation errors, which can result in incorrect calculations and a lack of real-time error detection.

Innovation Solution

A bounded floating-point processing device is introduced, which includes an additional bounding field (B Field) composed of a lost bits field (D Field) and an accumulated rounding error field (N Field), allowing for real-time detection and notification of error through a signaling NaN (sNaN) when significant bits are lost, thereby controlling the external representation of real values to ensure accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If standard floating-point arithmetic operations are performed without error tracking, then computation speed is maintained, but accumulated rounding error and catastrophic cancellation errors occur

Engineering Contradiction:
Improveaccuracy of floating-point operationsVSAvoidcomplexity of floating-point hardware
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent embeds error tracking fields (guard bit, sticky bit, and lost bits field) within the existing floating-point number format structure. These error tracking components are nested alongside the traditional sign, exponent, and significand fields, allowing error information to be carried along with the computed values without requiring separate external tracking mechanisms.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent performs error tracking operations concurrently with the main floating-point arithmetic operations. The guard bit and sticky bit are updated during the arithmetic operation itself, and the lost bits field is updated during normalization, rather than performing separate error analysis after computation completes.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If error tracking fields are added to floating-point numbers, then real-time error detection is enabled, but memory requirements increase

Engineering Contradiction:
Improvereal-time error detection capabilityVSAvoidmemory space for floating-point representation
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent uses different error tracking mechanisms for different parts of the floating-point number. The guard bit tracks rounding errors in the significand, the sticky bit tracks loss of significant bits during right shifts, and the lost bits field specifically tracks errors during normalization. Each field monitors a specific aspect of error, allowing precise tracking without uniformly increasing complexity across all components.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If normalization operations are performed on floating-point results, then standard format compliance is achieved, but loss of significant bits occurs

Engineering Contradiction:
Improvecompliance with IEEE 754 standardVSAvoidloss of significant bits during normalization
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

The patent implements feedback mechanisms where the lost bits field is updated during normalization based on the number of right shifts performed. The sticky bit provides continuous feedback about whether significant bits have been shifted out. This feedback allows the system to monitor and track the accumulation of errors during normalization operations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The lost bits field acts as an intermediary that captures information about significant bits lost during normalization. Instead of directly losing this information during the normalization process, the intermediary field records the extent of loss, allowing the system to later assess and handle the accumulated error appropriately.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If multiple floating-point operations are performed in sequence, then computational productivity increases, but accumulated rounding error grows

Engineering Contradiction:
Improvethroughput of floating-point operationsVSAvoidaccumulated rounding error
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent maintains continuous error tracking throughout a sequence of floating-point operations. The guard bit, sticky bit, and lost bits field are updated with each operation, ensuring that error information accumulates continuously alongside the computational results. This allows the system to track total accumulated error even as multiple operations are performed in sequence.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11797300B1Apparatus for calculating and retaining a bound on error during floating-point operations and methods thereof
Publication Date: 2023.10.24 JORGENSEN ALAN A
  • US11797300B1 patent drawing
  • US11797300B1 patent drawing
  • US11797300B1 patent drawing

AI summary

The apparatus and method for calculating and retaining a bound on error during floating-point operations inserts an additional bounding field into the standard floating-point format that records the retained significant bits of the calculation with notification upon insufficient retention. The bounding field, accounting for both rounding and cancellation errors, includes the lost bits D Field and the accumulated rounding error R Field. The D Field states the number of bits in the floating-point representation that are no longer meaningful. The bounds on the represented real value are determined by the truncated floating-point value and the addition of the error determined by the number of lost bits. The true, real value is absolutely contained by these bounds. The allowable loss (optionally programmable) of significant digits provides a fail-safe, real-time notification of loss of significant digits. This allows representation of real numbers accurate to the last digit.