Buried Power Rail Cell Air Void Layout for Cross-Coupling Reduction
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Solution Overview
Problem
In semiconductor integrated circuits, the integration of back side/buried power rail (BPR) cells leads to cross-coupling issues between adjacent cells, causing noise and negatively impacting overall performance.
Innovation Solution
Replace the dielectric material between conductive features of adjacent BPR cells with an air gap or air void, reducing cross-coupling by using a dielectric protection layer to cap the trench after cutting a dummy fin, thereby minimizing capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If dielectric material is used between conductive features of adjacent BPR cells, then electrical isolation is provided, but cross-coupling occurs causing noise and performance degradation
Solution Approach 1:
The patent changes the dielectric parameter (permittivity) by replacing the solid dielectric material with an air gap. Air has a permittivity of approximately 1, which is significantly lower than conventional dielectric materials, thereby reducing the capacitive coupling between adjacent conductive features and minimizing cross-coupling noise while maintaining electrical isolation.
Solution Approach 2:
The air gap acts as an intermediary medium between the conductive features of adjacent BPR cells. This intermediate air layer provides electrical isolation with minimal capacitive coupling, effectively mediating between the need for isolation and the desire to minimize cross-coupling noise.
2Speed
If air gap is introduced between adjacent BPR cells, then cross-coupling is reduced increasing speed by 20-50%, but manufacturing complexity increases
Solution Approach 1:
The air gap structure is prepared in advance during the fabrication process by forming trenches and filling them with air (leaving them empty) before subsequent processing steps. The dielectric protection layer is deposited over the air gap region beforehand to ensure proper planarization and protection during manufacturing, simplifying the overall process despite the structural change.
Solution Approach 2:
The air gap is introduced only in specific locations between adjacent BPR cells where cross-coupling occurs, rather than throughout the entire device. This localized modification targets the problematic areas while maintaining conventional structures elsewhere, thereby limiting the increase in manufacturing complexity to only the necessary regions.
3Object-affected harmful factors
If dummy fin is cut to create air void, then cross-coupling is minimized by reducing capacitance, but manufacturing precision requirements increase
Solution Approach 1:
The dummy fin is cut and air void is formed at a specific stage during the fabrication process, before final device assembly and testing. This preliminary formation allows for verification and adjustment of the air void dimensions and position while the device is still being manufactured, ensuring that precision requirements are met before the device is completed.
Solution Approach 2:
The cutting of the dummy fin and formation of the air void is integrated into the existing fabrication process flow, utilizing the same patterning and etching tools and processes already employed for other device features. This self-service approach leverages existing manufacturing capabilities to achieve the required precision without introducing entirely new process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the speed of BPR cells by 20% to 50% by reducing cross-coupling, enhancing the performance of integrated circuits.
Implementation Method 1
Replace the dielectric material between conductive features of adjacent BPR cells with an air gap or air void, reducing cross-coupling by using a dielectric protection layer to cap the trench after cutting a dummy fin, thereby minimizing capacitance.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate. The semiconductor device includes a first fin protruding from the semiconductor substrate and extending along a first direction. The semiconductor device includes a second fin protruding from the semiconductor substrate and extending along the first direction. A first epitaxial source/drain region coupled to the first fin and a second epitaxial source/drain region coupled to the second fin are laterally spaced apart from each other by an air void.


