Non-Coherent BPSK Demodulator With Sideband Phase Alignment

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Solution Overview

Problem

Conventional BPSK demodulation methods consume high power, are limited by complex circuits and feedback loops, and suffer from signal distortion and packet data loss due to internal oscillators and CMOS FET characteristics.

Innovation Solution

A low power wideband non-coherent BPSK demodulation method using sideband separation and delay units, differential output comparators, and a data demodulation unit with deglitch filters to align phase differences and minimize glitches, reducing jitter and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional coherent BPSK demodulation method is used, then demodulation accuracy is improved, but power consumption increases and circuit complexity increases

Engineering Contradiction:

Improvedemodulation accuracyVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The patent extracts and removes the internal oscillator component from the demodulation circuit, transitioning from coherent to non-coherent demodulation. This eliminates the need for carrier regeneration and synchronization, significantly reducing power consumption and circuit complexity while maintaining acceptable demodulation accuracy for wideband applications

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the BPSK signal into upper and lower sidebands using separate filter paths, processes them independently through dedicated comparators, and then combines the results. This segmentation enables parallel processing that reduces overall processing time and power consumption per unit of data demodulated

Inventive Principle:

Principle #1Segmentation

2Device complexity

If non-coherent DPSK demodulation with analog integrator is used, then circuit simplicity is improved, but power consumption increases and chip area increases

Engineering Contradiction:

Improvecircuit simplicityVSAvoidpower consumption

Core Design Contradiction:

Device complexityVSUse of energy by stationary object

Solution Approach 1:

The patent replaces the analog integrator and switched-capacitor units with a fully digital implementation using digital filters and logic circuits. This substitution eliminates the need for precision analog components, reduces power consumption, and improves manufacturability while maintaining circuit simplicity

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent uses digital signal copying and processing techniques where the incoming BPSK signal is replicated and processed through multiple parallel digital paths (upper sideband and lower sideband paths). This digital copying approach avoids the power-intensive analog integration while achieving the same demodulation function

Inventive Principle:

Principle #26Copying

3Measurement precision

If internal oscillator is used for carrier regeneration, then demodulation accuracy is improved, but device complexity increases and manufacturing yield decreases

Engineering Contradiction:

Improvedemodulation accuracyVSAvoidcircuit complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts and removes the internal oscillator from the demodulation architecture, accepting non-coherent detection. This eliminates complex carrier synchronization circuits, feedback loops, and phase-locked loops, significantly simplifying the device while maintaining adequate accuracy for wideband digital data demodulation

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs simple first-order filters and basic digital comparators instead of complex oscillator-based synchronization circuits. These simpler components are more robust to manufacturing variations and process deviations, improving yield while achieving the demodulation function

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

4Reliability

If first order sideband filters with phase alignment are used, then jitter is reduced and yield is improved, but device complexity increases

Engineering Contradiction:

Improvejitter reductionVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent optimizes the phase relationship between upper and lower sideband filter outputs to 180 degrees, creating constructive interference for signal detection. This parameter optimization reduces jitter and improves reliability while maintaining relatively simple first-order filter implementations

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent merges the outputs of the upper and lower sideband filter paths through a combination logic circuit that exploits the 180-degree phase relationship. This merging approach consolidates the parallel processing paths into a single robust detection mechanism, improving reliability without proportionally increasing complexity

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS10419256B2Low power wideband non-coherent binary phase shift keying demodulator to align the phase of sideband differential output comparators for reducing jitter, using first order sideband filters with phase 180 degree alignment

Publication Date: 2019.09.17 WILKERSON BENJAMIN P

AI summary

An embodiment of the present invention relates to a low-power broadband asynchronous BPSK demodulation method and a configuration of a circuit thereof. In connection with a configuration of a BPSK demodulation circuit, there may be provided a low-power wideband asynchronous binary phase shift keying demodulation circuit comprising: a sideband separation and lower sideband signal delay unit; a data demodulation unit; and a data clock restoration unit.