Conditional Branch Compaction for Instruction Cache Efficiency
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Solution Overview
Problem
Existing compiler optimizations fail to effectively reduce the size of instruction code in frequently executed regions, leading to increased execution time due to the limited capacity of instruction caches, where long-form conditional branches consume more space and decrease cache hit ratios.
Innovation Solution
A method that identifies frequently executed regions with long-form conditional branches that are infrequently taken, converts these branches into short-form conditional branches by inserting a trampoline unconditional branch, allowing the long-form branch's target to be modified to the location of the trampoline, thereby reducing code size and enhancing cache efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If long-form conditional branches are used in frequently executed regions, then the branch can reach distant targets, but the instruction code size increases and cache efficiency decreases
Solution Approach 1:
The patent segments the branch instruction into two parts: a short-form conditional branch instruction that remains in the frequently executed region, and a separate unconditional branch instruction (trampoline) that is inserted at the target location. This segmentation allows the hot region to use compact short-form branches while still achieving distant target reachability through the trampoline mechanism.
Solution Approach 2:
The patent introduces an intermediary unconditional branch instruction (trampoline) that mediates between the short-form conditional branch in the hot region and the distant target. This trampoline instruction acts as a mediator that enables the short-form branch to reach distant targets without increasing the size of the hot region's instruction code.
2Adaptability or versatility
If long-form conditional branches are used, then distant targets can be reached, but cache hit ratios decrease due to increased code size
Solution Approach 1:
The patent segments the branch mechanism into a short-form conditional branch that stays in the hot region and a separate trampoline unconditional branch at the target. This segmentation ensures that the hot region's instruction cache contains only compact short-form branches, maximizing cache hit ratios while still enabling distant target reachability through the trampoline.
Solution Approach 2:
The trampoline unconditional branch serves as an intermediary that bridges the short-form conditional branch in the hot region to the distant target. This intermediary mechanism allows the hot region to maintain small instruction code size for high cache efficiency while achieving distant target reachability through the trampoline's intervention.
3Quantity of substance
If short-form conditional branches are used, then instruction code size is reduced and cache efficiency is improved, but branch target reachability is limited
Solution Approach 1:
The patent merges the functionality of long-form branching with short-form branching by combining a short-form conditional branch instruction with a separate unconditional branch instruction (trampoline). This merging allows the system to achieve distant target reachability (long-form capability) while keeping the hot region's instruction code compact (short-form benefit), thus resolving the contradiction between code size and reachability.
Solution Approach 2:
The trampoline unconditional branch acts as an intermediary that extends the reachability of short-form conditional branches. By inserting this intermediary instruction at the target location, the patent enables short-form branches to reach distant targets without increasing the size of the hot region's instruction code, thus maintaining both small code size and high reachability.
Data Source
AI summary
In an approach for decreasing an execution time of a computer code, one or more processors receive a computer code and identify a frequently executed region of the computer code. One or more processors identify a long-form conditional branch in the frequently executed region of the computer code that is infrequently taken. One or more processors generate a long-form unconditional branch with a target that is a target of the long-form conditional branch. One or more processors modify the long-form conditional branch to be a short-form conditional branch. One or more processors insert the long-form unconditional branch in the computer code within a branch distance of the short-form conditional branch. One or more processors modify a target of the short-form conditional branch to be a location of the long-form unconditional branch in the computer code.


