Branch Prediction Insertion for Deterministic Instruction Execution

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Solution Overview

Problem

Existing computing devices for fault intolerant and safety-critical applications face a trade-off between computing performance and deterministic execution due to interruptions caused by conditional branches, leading to compromised performance when deterministic execution cannot be sacrificed.

Innovation Solution

A method for deterministic execution of an instruction set by predicting and inserting pre-branch and target instructions after conditional branches, ensuring they are always executed, thereby eliminating execution breaks and improving performance without compromising deterministic timing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conditional branches are used in the instruction set, then adaptability and decision-making capability are improved, but execution continuity is interrupted and deterministic timing is compromised

Engineering Contradiction:
Improvedecision-making capabilityVSAvoidexecution continuity
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent applies preliminary action by executing predicted target instructions before the conditional branch condition is fully evaluated. The processing unit predicts the branch outcome and pre-executes the target instructions in advance, so that when the branch is taken, the instructions are already ready to be executed immediately, eliminating execution gaps and maintaining deterministic timing while preserving adaptability.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If branch prediction is used to maintain execution continuity, then computing performance is improved, but deterministic timing cannot be guaranteed

Engineering Contradiction:
Improvecomputing performanceVSAvoiddeterministic timing
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback by continuously monitoring whether the predicted branch outcome matches the actual condition evaluation result. If the prediction is correct, the pre-executed instructions are executed as expected, maintaining both performance and determinism. If the prediction is incorrect, the system detects the mismatch and executes alternative instructions, ensuring that timing guarantees are maintained while still benefiting from prediction-based performance improvements.

Inventive Principle:
Principle #23Feedback

3Reliability

If static branch predictors are used, then deterministic timing is maintained, but computing performance is limited

Engineering Contradiction:
Improvedeterministic timingVSAvoidcomputing performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies dynamics by transitioning from static branch prediction to a dynamic prediction mechanism that adapts to actual execution conditions. The processing unit dynamically adjusts its prediction behavior based on real-time condition evaluation, allowing it to maintain deterministic timing guarantees while achieving higher computing performance through more accurate and flexible branch prediction strategies.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260003632A1Method, Computer Program, Computer-Readable Data Carrier And Computing Device For Deterministic Execution Of An Instruction Set As Well As Apparatus Comprising Same
Publication Date: 2026.01.01 AIRBUS (SAS)
  • US20260003632A1 patent drawing
  • US20260003632A1 patent drawing
  • US20260003632A1 patent drawing

AI summary

A method for deterministic execution of an instruction set (I) containing instructions (M) to be carried out by a processing unit of the computing device includes the steps of executing a predefined number of pre-branch instructions (A) up to a conditional branch (C) of the instruction set (I) containing at least one branch condition determining a subsequent instruction which is to be executed after the conditional branch (C); predicting at least one of the pre-branch instructions (A) and/or a target instruction (T) to be executed as the subsequent instruction if the at least one condition is met; and inserting the at least one predicted pre-branch instruction (A) and/or the target instruction (T) into the instruction set (I) after the conditional branch (C). A computer program, computer-readable data-carrier, computing device, and apparatus, such as a vehicle, in particular an aircraft may be configured to perform the method.