Microprocessor Branch Prediction Unit Power Reduction
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Solution Overview
Problem
Branch instructions in microprocessors reduce pipeline efficiency by causing delays and increased power consumption due to unnecessary access to branch history tables (BHT) and branch target buffers (BTB) for non-control flow instructions.
Innovation Solution
Implementing a control instruction identification unit that distinguishes between control flow and non-control flow instructions, allowing only control flow instructions to access BHT and BTB for branch prediction information, thereby reducing unnecessary power consumption by limiting access for non-control flow instructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If branch prediction checking is performed for all fetched instructions, then branch prediction accuracy is maintained, but power consumption increases due to unnecessary access to BHT and BTB for non-control flow instructions
Solution Approach 1:
The patent segments the instruction stream into control flow instructions and non-control flow instructions using a classification unit. This segmentation allows the system to apply branch prediction checking selectively only to control flow instructions, eliminating unnecessary power consumption from checking non-control flow instructions while maintaining branch prediction accuracy for relevant instructions.
Solution Approach 2:
The patent implements partial action by performing branch prediction checking only on a subset of instructions (control flow instructions) rather than all fetched instructions. The classification unit identifies which instructions require branch prediction checking, allowing the system to do exactly what is necessary without excess operations, thereby reducing power consumption while maintaining prediction accuracy.
2Reliability
If branch prediction checking is performed for all fetched instructions, then no control flow instructions are missed, but processing time is wasted on unnecessary checks for non-control flow instructions
Solution Approach 1:
The patent applies preliminary action by classifying instructions as control flow or non-control flow before branch prediction checking occurs. The classification unit prepares the instruction stream in advance, tagging or filtering control flow instructions, so that subsequent branch prediction checking can proceed efficiently without wasting time on non-control flow instructions.
Solution Approach 2:
The patent segments the instruction processing pipeline into classification and branch prediction checking stages. By separating control flow instructions from non-control flow instructions through classification, the system eliminates unnecessary processing time for non-control flow instructions while ensuring all control flow instructions receive appropriate branch prediction checking.
3Reliability
If BHT and BTB are accessed for every instruction, then branch prediction information is available for all instructions, but device complexity increases due to continuous activation of prediction units
Solution Approach 1:
The patent introduces dynamic control over BHT and BTB access based on instruction type. The classification unit dynamically determines whether each fetched instruction is a control flow instruction, and only then activates access to BHT and BTB. This dynamic approach reduces device complexity by keeping prediction units inactive for non-control flow instructions while maintaining information availability when needed.
Solution Approach 2:
The classification unit enables the system to self-regulate BHT and BTB access based on the characteristics of the instruction stream. By automatically identifying control flow instructions, the system serves itself in determining when branch prediction information is needed, eliminating the need for continuous activation of prediction units and reducing overall device complexity.
Data Source
AI summary
Some microprocessors check branch prediction information in a branch history table and/or a branch target buffer. To check for branch prediction information, a microprocessor can identify which instructions are control flow instructions and which instructions are non control flow instructions. To reduce power consumption in the branch history table and/or branch target buffer, the branch history table and/or branch target buffer can check for branch prediction information corresponding to the control flow instructions and not the non control flow instructions.