Branch Prediction Unit Power Reduction via Dynamic State Control

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Solution Overview

Problem

The existing branch prediction unit in microprocessors consumes unnecessary power as it is powered up during every instruction fetch, even when the fetched instruction data does not include a branch instruction, leading to increased power consumption without significant performance reduction.

Innovation Solution

Implementing a system to track whether previously fetched instruction data includes branch instructions, allowing the branch prediction unit to be powered down when no branches are detected, thereby reducing unnecessary activations and conserving power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the branch prediction unit is powered up during every instruction fetch, then branch predictions can be made for all fetched instructions, but power is consumed even when the fetched instruction data does not include a branch instruction

Engineering Contradiction:

Improvebranch prediction availabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The branch prediction unit transitions between powered-up and powered-down states dynamically based on whether branch instructions are detected in the fetched instruction data. This dynamic state change allows the system to maintain reliability when branches are present while reducing power consumption when branches are absent

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system uses information from the instruction cache lookup process itself to control the branch prediction unit. The presence detection logic automatically determines whether the branch prediction unit should be activated, making the system self-regulating without requiring external control signals

Inventive Principle:

Principle #25Self-service

2Reliability

If the branch prediction unit is powered up for every instruction fetch operation, then no branch instructions are missed, but unnecessary power consumption occurs when fetched instruction data does not include a branch instruction

Engineering Contradiction:

Improvebranch instruction detectionVSAvoidwasted power

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The system performs a preliminary check to detect the presence of branch instructions in the fetched instruction data before activating the branch prediction unit. This preliminary detection action prevents unnecessary power consumption by avoiding activation when no branches are present

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from the instruction cache lookup process about whether branch instructions are present in the fetched data to control the power state of the branch prediction unit. This feedback mechanism ensures the unit is only powered up when actually needed

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS9547358B2Branch prediction power reduction

Publication Date: 2017.01.17 NVIDIA CORP

AI summary

In one embodiment, a microprocessor is provided. The microprocessor includes a branch prediction unit. The branch prediction unit is configured to track the presence of branches in instruction data that is fetched from an instruction memory after a redirection at a target of a predicted taken branch. The branch prediction unit is selectively powered up from a powered-down state when the fetched instruction data includes a branch instruction and is maintained in the powered-down state when the fetched instruction data does not include an instruction branch in order to reduce power consumption of the microprocessor during instruction fetch operations.