Branch Predictor Out-of-Order Refetch for Pipeline Performance

Solution Overview

Problem

Existing arithmetic processing devices face reduced processing performance due to the inability to output instruction refetch requests out of order without compromising the prediction accuracy of conditional branch instructions.

Innovation Solution

An arithmetic processing device is designed with a branch predictor that holds prediction information for conditional branch instructions, allowing for out-of-order output of instruction refetch requests. The device includes an address generator and a branch instruction issuance scheduler that manage the refetch requests and update prediction values to maintain prediction accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the instruction refetch request is output in order (waiting for the conditional branch instruction to reach the head of the queue), then the prediction accuracy of conditional branch instructions is maintained, but the processing time of the instruction fetch pipeline cannot be hidden and processing performance is reduced

Engineering Contradiction:

Improveprediction accuracyVSAvoidprocessing performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by outputting the instruction refetch request before the conditional branch instruction reaches the head of the queue. The refetch request is issued as soon as a branch prediction miss is detected, allowing the instruction fetch pipeline to begin processing the refetch operation in advance. This hides the processing time of the instruction fetch pipeline and improves overall processing performance while maintaining prediction accuracy through the repair request mechanism.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces a repair request as an intermediary mechanism to maintain prediction accuracy when refetch requests are output out of order. The repair request is sent to the branch predictor to correct the prediction state for conditional branch instructions between the current queue position and the head of the queue. This intermediary repair mechanism ensures that prediction accuracy is preserved even though the refetch request is issued prematurely.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If the instruction refetch request is output out of order (without waiting for the conditional branch instruction to reach the head of the queue), then the processing time of the instruction fetch pipeline can be hidden and processing performance is improved, but no method has been proposed that maintains the prediction accuracy of conditional branch instructions

Engineering Contradiction:

Improveprocessing performanceVSAvoidprediction accuracy

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by outputting the instruction refetch request before the conditional branch instruction reaches the head of the queue. The refetch request is issued as soon as a branch prediction miss is detected, allowing the instruction fetch pipeline to begin processing the refetch operation in advance. This hides the processing time of the instruction fetch pipeline and improves overall processing performance while maintaining prediction accuracy through the repair request mechanism.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the repair request mechanism that sends correction information back to the branch predictor. When a refetch request is output out of order, the repair request provides feedback to update the prediction state for affected conditional branch instructions, ensuring that the branch predictor maintains accurate prediction information despite the out-of-order refetch operation.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS12314724B2Arithmetic processing device and arithmetic processing method

Publication Date: 2025.05.27 FUJITSU LTD

AI summary

An arithmetic processing device executes instructions by pipeline processing. In the arithmetic processing device, a branch predictor includes a prediction holder holding a prediction value of a consecutively taken branch count, a current taken branch count, and a prediction value of a remaining taken branch count for conditional branch instructions. A branch instruction issuance scheduler outputs an instruction refetch request upon a branch prediction miss of a conditional branch instruction held at an entry other than a head of a branch instruction completion queue holding branch instructions to be completed, and a repair request to the branch predictor for conditional branch instructions held between the entry and the head of the queue. In response to the requests, the branch predictor updates the prediction value of the remaining taken branch count for the conditional branch instructions corresponding to the repair request.