Branched Hybrid Flex Substrates for CTE-Tolerant Die Bonding
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Solution Overview
Problem
Challenges exist in integrating semiconductor elements of different types or material sets on a substrate or in a package due to coefficient of thermal expansion (CTE) mismatches, and providing effective communication between stacks while maintaining a low profile.
Innovation Solution
The use of hybrid bonding surfaces comprising dielectric and conductive regions, which are directly bonded without adhesives, allowing for flexible substrates with compliant materials that accommodate thermal expansion and enable high-density electrical connections through covalent bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If semiconductor elements of different types or material sets are integrated on a substrate, then functionality and performance are improved, but CTE mismatches cause stress, warping, and potential failure
Solution Approach 1:
The patent employs flexible interposer substrates with compliant materials that can bend and deform to accommodate CTE differences between bonded semiconductor elements. The flexible substrate acts as a buffer layer that absorbs thermal expansion stress through elastic deformation, preventing warping and connection failure while enabling integration of diverse semiconductor components with different thermal properties.
2Reliability
If hybrid bonding surfaces are used to integrate semiconductor elements, then electrical communication is enabled, but maintaining a low profile while providing effective communication between stacks is challenging
Solution Approach 1:
The patent implements a stacked architecture where semiconductor elements are vertically nested on the flexible interposer substrate. Multiple device stacks are arranged in layers, with each stack containing multiple bonded elements. This nesting approach enables high-density electrical communication through vertical interconnections while maintaining a compact overall profile, as the communication pathways are integrated within the stacked structure rather than requiring lateral expansion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach facilitates seamless integration of semiconductor elements with different CTEs, maintaining a low profile and ensuring reliable electrical communication without mechanical damage or disconnection, even under thermal stress.
Implementation Method 1
allowing for flexible substrates with compliant materials that accommodate thermal expansion and enable high-density electrical connections through covalent bonding
Implementation Method 2
Challenges exist in integrating semiconductor elements of different types or material sets on a substrate or in a package due to mismatches in coefficient of thermal expansion (CTE)
Data Source
AI summary
Methods for fabricating branched substrates having conductive contact pads and hybrid dielectric bonding surfaces for directly bonding dies and electrically connecting them to the contact pads. A branched substrate can include a main portion and one or more branch portions hybrid bonded to the main portion. Some sections of the branched substrate can be flexible to allow deformable electrical connection between components that are hybrid bonded to different regions of the branched substrate. A flexible branch portion may provide electrical connection between vertically separated layers of two components. The method includes directly bonding a branch portion of the branched substrate to the main portion of the branched substrate via a hybrid bonding interface comprising a conductive interface between contact pads of the main and branch portions and a hybrid bonded dielectric interface between dielectric surfaces of the of the main and branch portions.


