Bridge Bonding Alignment for Multiple Semiconductor Chips
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Solution Overview
Problem
Current multi-chip interconnection techniques face challenges in achieving accurate alignment and support during the bridging process, particularly with the fragile bridge member and micro-bumps, which require precise horizontal and vertical alignment with alignment accuracy less than 5 micrometers horizontally and 2 micrometers vertically, and struggle with end-to-end support and misalignment issues.
Innovation Solution
A method and apparatus utilizing a chip handler with support surfaces for pre-alignment of chips and bridge members, allowing for accurate placement and bonding of multiple chips with a bridge member, and providing a controlled environment for the bridging process, including the use of reduction gas for cleaning and preventing corrosion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If solder volume for the bump is decreased to achieve smaller micro-bumps for dense interconnections, then interconnection density is improved, but alignment difficulty especially for vertical alignment increases
Solution Approach 1:
The patent applies preliminary action by pre-aligning the bridge member with the first chip before bonding the second chip. The bridge member is positioned and aligned with the first chip's bumps in advance, creating a stable reference framework. This preliminary alignment reduces the cumulative alignment error and makes the subsequent bonding process easier, directly addressing the alignment difficulty caused by smaller micro-bumps.
2Reliability
If alignment accuracy between chips and bridge member is increased to prevent misalignment, then interconnection reliability is improved, but process complexity increases
Solution Approach 1:
The patent segments the alignment process into distinct stages: first aligning the bridge member with the first chip, then using this aligned structure as a reference for positioning the second chip. This segmentation breaks down the complex multi-chip alignment problem into manageable steps, reducing overall process complexity while maintaining high alignment accuracy and reliability.
Solution Approach 2:
The bridge member serves as an intermediary element that mediates the alignment between the first and second chips. By establishing the bridge member's position first and using it as a reference, the patent simplifies the alignment process compared to directly aligning multiple chips without an intermediate reference structure.
3Stability of the object's composition
If end-to-end support for the fragile bridged module is provided throughout the process, then structural stability is improved, but equipment complexity increases
Solution Approach 1:
The chip handler is designed with multi-functionality, serving as both a support structure for the fragile bridged module and an alignment reference. This single device performs multiple functions: providing mechanical support during bonding, maintaining precise positioning, and serving as a reference for subsequent bonding operations. This universality reduces equipment complexity compared to using separate devices for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise alignment and bonding of multiple chips with a bridge member, ensuring accurate interconnection and support during the bridging process, reducing misalignment and corrosion risks, and facilitating efficient bonding to a substrate.
Implementation Method 1
suppling reduction gas into the chamber space to clean the first sets of terminals of the first chip and the second chip and/or the terminals of the bridge member
Data Source
AI summary
Interconnecting a first chip and a second chip includes mounting the first and second chips to a chip handler having an opening and at least one support surface. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The first surface of the first chip and the first surface of the second chip mounted to the chip handler are supported by the at least one support surface of the chip handler. The first and second chips are placed on a chip support member with the chip handler from the second surfaces. A bridge member is inserted by a bridge handler through the opening of the chip handler to place the bridge member onto the first sets of terminals of the first and second chips that are exposed from the opening.