Bridge Cell for Mixed VT Logic Block Integration
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Solution Overview
Problem
The coexistence of regular-well voltage threshold (RVT) and flipped-well voltage threshold (FVT) devices in the same logic block poses challenges in mixed VT implementations, leading to inefficient area usage and well biasing in physical design.
Innovation Solution
The implementation of a bridge cell structure that allows for reciprocal well orientation, enabling the abutment of RVT and FVT cells, and providing area equivalency and well biasing for both types of cells, thereby improving power, performance, and area (PPA) while resolving well isolation and latch-up violations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If regular-well voltage threshold (RVT) and flipped-well voltage threshold (FVT) devices are coexisted in the same logic block, then mixed VT implementation is achieved, but area efficiency and well biasing become challenging
Solution Approach 1:
A bridge cell is introduced as an intermediary structure between RVT cells and FVT cells in the same logic block. The bridge cell contains both N-well and P-well regions with reciprocal orientation, enabling it to abut both RVT and FVT cells while maintaining proper well isolation and biasing for each cell type, thus achieving mixed VT implementation without compromising area efficiency
2Adaptability or versatility
If regular-well voltage threshold (RVT) and flipped-well voltage threshold (FVT) devices are coexisted in the same logic block, then mixed VT implementation is achieved, but well isolation and latch-up violations occur
Solution Approach 1:
The bridge cell implements different well orientations in different regions: the N-well region is oriented to properly isolate and bias RVT cells on one side, while the P-well region is oriented to properly isolate and bias FVT cells on the other side. This local differentiation of well orientation quality enables reliable mixed VT implementation by ensuring each cell type receives appropriate well isolation and biasing in its adjacent region
Data Source
AI summary
Various implementations described herein are directed to device having a regular well cell and a flipped well cell. The regular well cell has a first N-well and a first P-well, and the flipped well cell has a second N-well and a second P-well in complementary relationship with the first N-well and the first P-well of the regular well cell. The device includes a bridge cell disposed between the regular well cell and the flipped well cell.


