Bridge Chip Fan-Out Layout Without Dummy Solder Balls
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Solution Overview
Problem
Conventional chip package structures with bridge chips have inefficient solder ball utilization due to dummy solder balls occupying a large area, reducing the effective area and limiting design integration.
Innovation Solution
A bridge chip with a top surface featuring first pads and a chip connecting structure, electrically connected to a first metal wire layer through leads, and a bottom surface bonded to the metal wire layer via bumps, allowing for functional solder balls and expanded design possibilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dummy solder balls are arranged below the bridge chip to achieve uniform solder ball distribution, then the solder ball arrangement uniformity is improved, but the effective area of the chip is greatly reduced
Solution Approach 1:
The patent extracts the non-functional dummy solder balls from the design by making the bridge chip area larger than the solder ball array area, allowing solder balls to be placed only at functional locations below the bridge chip. This eliminates the waste of effective area while maintaining uniform solder ball distribution through proper positioning.
Solution Approach 2:
The patent increases the bridge chip area in the horizontal dimension to exceed the solder ball array area, fundamentally changing the size relationship between the bridge chip and solder ball arrangement. This dimensional change allows functional solder balls to be placed below the bridge chip without requiring dummy balls, thus improving effective area utilization.
2Adaptability or versatility
If the bridge chip area is increased to improve design integration, then the integration capability is improved, but the proportion of dummy solder balls increases
Solution Approach 1:
The patent removes dummy solder balls from the design by making the bridge chip area larger than the solder ball array area. This allows all solder balls to be functional, eliminating the loss associated with dummy balls while enabling larger bridge chip designs for improved integration.
Solution Approach 2:
By increasing the bridge chip area in the horizontal dimension to exceed the solder ball array area, the patent enables larger bridge chips for better design integration without increasing the proportion of dummy solder balls, as no dummy balls are needed when the bridge chip fully covers the solder ball array.
3Reliability
If leads are used to electrically connect the top surface to the first metal wire layer, then the electrical connection reliability is improved, but the device complexity increases
Solution Approach 1:
The patent introduces leads as intermediary elements to connect the top surface pads to the first metal wire layer. These leads serve as mediators that reliably transmit electrical signals while allowing physical separation between the top surface circuitry and the substrate connection points, improving reliability despite the added structural element.
Solution Approach 2:
The leads extend vertically from the top surface through the bridge chip to the first metal wire layer, utilizing the vertical dimension to establish electrical connections. This three-dimensional routing approach improves connection reliability by providing dedicated vertical pathways while organizing the complexity in a structured manner.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the efficiency of the fan-out package structure by utilizing all areas effectively, enabling larger bridge chips with independent circuit structures and improved integration, while reducing costs through mature lead bonding technology.
Implementation Method 1
the lead is configured to electrically connect the top surface of the bridge chip and a first metal wire layer that is connected to a bottom surface of the bridge chip
Implementation Method 2
the bottom surface of the bridge chip is configured to be bonded to a first surface of the first metal wire layer by a plurality of bumps
Data Source
AI summary
The present invention relates to the technical field of chip packaging, and discloses a bridge chip, a fan-out package structure and a corresponding packaging method, wherein a top surface of the bridge chip is provided with a plurality of first pads and a chip connecting structure, the plurality of first pads are separately configured to connect a lead, the lead is configured to electrically connect the top surface of the bridge chip and a first metal wire layer that is connected to a bottom surface of the bridge chip, and the chip connecting structure is configured to bridge at least two chips. The present invention conducts the bridge chip by a lead bonding technology, has a stable and mature process, fully utilizes an internal space of a fan-out package body without increasing a thickness and a volume of the package body, and thereby maximizing the chip function.