Bridge Chip Layout With On-Die Capacitors for Power Integrity
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Solution Overview
Problem
The existing semiconductor packages face challenges in maintaining power integrity (PI) due to long power transmission paths caused by the need for a bridge die, which disrupts the power wire path, hindering faster processing speeds and increased storage capacity.
Innovation Solution
The semiconductor package design includes signal wires and capacitor structures that connect logic and high bandwidth memory (HBM) dies, with the capacitor structures positioned in 'garbage areas' where signal wires are not present, and through-silicon vias are used to reduce power transmission path lengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a bridge die is used to connect HBM and logic die to the substrate, then connectivity between components is improved, but power transmission path length increases and power integrity deteriorates
Solution Approach 1:
The patent changes the orientation of signal wires from extending in the first horizontal direction (parallel to substrate edges) to extending in a third horizontal direction at an angle (e.g., 45 degrees) between the first and second horizontal directions. This dimensional change in wire routing allows capacitor structures to be positioned in previously unusable 'garbage areas' on the bridge die, thereby shortening power transmission paths while maintaining connectivity functionality.
2Ease of manufacture
If signal wires extend in the first horizontal direction, then routing is simplified, but garbage area is wasted and capacitor structures cannot be optimally positioned
Solution Approach 1:
The signal wires are routed in a third horizontal direction that is angled (e.g., 45 degrees) relative to the first horizontal direction, creating diagonal routing patterns. This transforms previously wasted garbage areas into usable spaces for capacitor structures, effectively increasing the usable area of the bridge die while maintaining manufacturability through standardized routing angles.
3Use of energy by stationary object
If capacitor structures are placed on the substrate, then power supply is provided, but power transmission path length is long due to substrate routing
Solution Approach 1:
The capacitor structures are extracted from the substrate and repositioned onto the bridge die itself, specifically in the garbage areas created by angled signal wire routing. This extraction eliminates the need for long power transmission paths through the substrate, as capacitors can now be placed much closer to the logic die and HBM, directly on the bridge die that already connects these components.
Data Source
AI summary
A bridge chip includes a first side surface, a second side surface opposite to the first side surface in a first horizontal direction, a third side surface, a fourth side surface opposite to the third side surface in a second horizontal direction intersecting the first horizontal direction, a plurality of signal wires extending in a third horizontal direction between the first horizontal direction and the second horizontal direction, and one or more capacitor structures around the plurality of signal wires. The first ends of the plurality of signal wires are disposed in a first line along the first side surface. The second ends of the plurality of signal wires are disposed in a second line along the second side surface.