Bridge Die TSV Architecture With Air Gaps for Lower Parasitics

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Solution Overview

Problem

Current bridge dies in IC packages are limited in power delivery due to the lack of through-silicon vias (TSVs) and the associated electrical parasitics, which restrict their electrical effectiveness.

Innovation Solution

The implementation of a package architecture that includes a bridge die with conductive pathways and TSVs extending through its thickness, featuring air gaps around the TSVs to reduce parasitic losses such as impedance and dielectric constant.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If bridge dies include TSVs for power delivery, then power delivery capability is improved, but electrical parasitics increase

Engineering Contradiction:
Improvepower delivery capabilityVSAvoidelectrical parasitics
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The patent applies the porous materials principle by introducing air gaps (void spaces) around the TSVs within the bridge die structure. These air gaps create a porous-like configuration that reduces the dielectric constant and electrical parasitics while maintaining the TSV's power delivery function. The air gaps effectively reduce the harmful electromagnetic coupling and signal interference between adjacent TSVs.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The air gaps act as intermediary elements between adjacent TSVs, providing electrical isolation and reducing parasitic coupling. These gaps serve as mediators that prevent direct electromagnetic interaction between neighboring conductive structures, thereby reducing electrical parasitics while allowing the TSVs to maintain their power delivery function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If bridge dies include TSVs, then electrical effectiveness is improved, but device complexity increases

Engineering Contradiction:
Improveelectrical effectivenessVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the TSV structure into distinct components: the conductive TSV core and the surrounding air gap regions. This segmentation allows independent optimization of each component - the TSV for power delivery and the air gaps for parasitic reduction - thereby improving electrical effectiveness while managing complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The air gaps are strategically placed only in specific regions around the TSVs where parasitic effects are most problematic, rather than uniformly throughout the entire bridge die. This local quality approach optimizes electrical effectiveness in critical areas while minimizing the overall structural complexity and material usage.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances the electrical performance of bridge dies by reducing parasitic losses, thereby improving power delivery and overall performance in IC packages.

Implementation Method 1

air gaps around the TSVs to reduce parasitic losses such as impedance and dielectric constant

Methodology Applied
Scientific EffectParasitic losses: Electrical Resistance

Data Source

PatentEP4510187A1Package architecture with bridge dies having air gaps around vias
Publication Date: 2025.02.19 INTEL CORP
  • EP4510187A1 patent drawingFigure 1~2A
  • EP4510187A1 patent drawingFigure 2B~2C
  • EP4510187A1 patent drawingFigure 3~4

AI summary

Embodiments of a semiconductor die comprise: a first bond-pad on a first surface to couple to a package substrate, a second bond-pad on a second surface, the second surface being opposite to the first surface, a hole through the semiconductor die, a conductive pillar within the hole separated from sidewalls of the hole by an air gap, the conductive pillar coupled to the first bond-pad and the second bond-pad, and pathways conductively coupling at least two integrated circuit (IC) dies proximate to the second surface.